Datasheet

ST7LITE0xY0, ST7LITESxY0
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13.3.2 Operating Conditions with Low Voltage Detector (LVD)
T
A
= -40 to 85°C, unless otherwise specified
Notes:
1. Not tested in production.
2. Not tested in production. The V
DD
rise time rate condition is needed to ensure a correct device power-on and LVD reset.
When the V
DD
slope is outside these values, the LVD may not ensure a proper reset of the MCU.
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
T
A
= -40 to 85°C, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
V
IT+
(LVD)
Reset release threshold
(V
DD
rise)
High Threshold
Med. Threshold
Low Threshold
4.00
1)
3.40
1)
2.65
1)
4.25
3.60
2.90
4.50
3.80
3.15
V
V
IT-
(LVD)
Reset generation threshold
(V
DD
fall)
High Threshold
Med. Threshold
Low Threshold
3.80
3.20
2.40
4.05
3.40
2.70
4.30
1)
3.65
1)
2.90
1)
V
hys
LVD voltage threshold hysteresis V
IT+
(LVD)
-V
IT-
(LVD)
200 mV
Vt
POR
V
DD
rise time rate
2)
20 20000 µs/V
t
g(VDD)
Filtered glitch delay on V
DD
Not detected by the LVD 150 ns
I
DD(LVD
) LVD/AVD current consumption 220 µA
Symbol Parameter Conditions Min Typ Max Unit
V
IT+
(AVD)
1=>0 AVDF flag toggle threshold
(V
DD
rise)
High Threshold
Med. Threshold
Low Threshold
4.40
3.90
3.20
4.70
4.10
3.40
5.00
4.30
3.60
V
V
IT-
(AVD)
0=>1 AVDF flag toggle threshold
(V
DD
fall)
High Threshold
Med. Threshold
Low Threshold
4.30
3.70
2.90
4.60
3.90
3.20
4.90
4.10
3.40
V
hys
AVD voltage threshold hysteresis V
IT+
(AVD)
-V
IT-
(AVD)
150 mV
∆V
IT-
Voltage drop between AVD flag set
and LVD reset activation
V
DD
fall 0.45 V
1