STM32F030x4 STM32F030x6 STM32F030x8 STM32F030xC Value-line Arm®-based 32-bit MCU with up to 256 KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation Datasheet - production data Features • Core: Arm® 32-bit Cortex®-M0 CPU, frequency up to 48 MHz • Memories – 16 to 256 Kbytes of Flash memory – 4 to 32 Kbytes of SRAM with HW parity • CRC calculation unit • Reset and power management – Digital & I/Os supply: VDD = 2.4 V to 3.6 V – Analog supply: VDDA = VDD to 3.
Contents STM32F030x4/x6/x8/xC Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 Arm® Cortex®-M0 core with embedded Flash and SRAM . . . . . . . . . . . . 12 3.2 Memories . . . . . . . . . . . . . . . . . . .
STM32F030x4/x6/x8/xC Contents 3.15 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.16 Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4 Pinouts and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6 Electrical characteristics . . . . . . . . . . . . . .
Contents 7 STM32F030x4/x6/x8/xC Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 7.1 LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 7.2 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 7.3 LQFP32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 7.4 TSSOP20 package information . . . . . . . . . . . . . . .
STM32F030x4/x6/x8/xC List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46.
List of tables Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. 6/93 STM32F030x4/x6/x8/xC I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 ADC characteristics . . . . . . . . .
STM32F030x4/x6/x8/xC List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Block diagram . . . . . . . . . . .
Introduction 1 STM32F030x4/x6/x8/xC Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F030x4/x6/x8/xC microcontrollers. This document should be read in conjunction with the STM32F0x0xx reference manual (RM0360). The reference manual is available from the STMicroelectronics website www.st.com. For information on the Arm®(a) Cortex®-M0 core, please refer to the Cortex®-M0 Technical Reference Manual, available from the www.arm.com website. a.
STM32F030x4/x6/x8/xC 2 Description Description The STM32F030x4/x6/x8/xC microcontrollers incorporate the high-performance Arm® Cortex®-M0 32-bit RISC core operating at a 48 MHz frequency, high-speed embedded memories (up to 256 Kbytes of Flash memory and up to 32 Kbytes of SRAM), and an extensive range of enhanced peripherals and I/Os.
Description STM32F030x4/x6/x8/xC Table 2. STM32F030x4/x6/x8/xC family device features and peripheral counts Peripheral Flash (Kbytes) STM32 F030F4 STM32 F030K6 STM32 F030C6 STM32 F030C8 STM32 F030CC STM32 F030R8 STM32 F030RC 16 32 32 64 256 64 256 8 32 8 32 1 (16-bit)(2) 2 (16-bit) SRAM (Kbytes) 4 Advanced control Timers 1 (16-bit) General purpose 4 (16-bit)(1) Basic GPIOs 1 (16-bit)(2) - SPI Comm.
STM32F030x4/x6/x8/xC Description Figure 1. Block diagram POWER Serial Wire Debug Obl Flash memory interface SWCLK SWDIO as AF SRAM controller NVIC Bus matrix CORTEX-M0 CPU fMAX = 48 MHz VDD18 Flash GPL 16/32/64/256 KB 32-bit @ VDDA HSI PLLCLK LSI GP DMA 5 channels VDD = 2.4 to 3.6 V VSS @ VDD SRAM 4/8/32 KB HSI14 VOLT.REG 3.3 V to 1.8 V POR Reset Int SUPPLY SUPERVISION POR/PDR NRST VDDA VSSA VDD RC 14 MHz RC 8 MHz @ VDDA @ VDD PLL RC 40 kHz XTAL OSC 4-32 MHz OSC_IN OSC_OUT Ind.
Functional overview STM32F030x4/x6/x8/xC 3 Functional overview 3.1 Arm® Cortex®-M0 core with embedded Flash and SRAM The Arm® Cortex®-M0 processor is the latest generation of Arm processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts.
STM32F030x4/x6/x8/xC 3.4 Functional overview Cyclic redundancy check calculation unit (CRC) The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a configurable generator polynomial value and size. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity.
Functional overview 3.5.4 STM32F030x4/x6/x8/xC Low-power modes The STM32F030x4/x6/x8/xC microcontrollers support three low-power modes to achieve the best compromise between low power consumption, short startup time and available wakeup sources: • Sleep mode In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU when an interrupt/event occurs. • Stop mode Stop mode achieves very low power consumption while retaining the content of SRAM and registers.
STM32F030x4/x6/x8/xC Functional overview Figure 2. Clock tree of STM32F030x4/x6/x8 FLITFCLK I2C1SW 8 MHz HSI RC HSI HSI HSI Flash memory programming interface I2C1 SYSCLK /2 HCLK PLLSRC SW PLLMUL PREDIV OSC_IN 4-32 MHz HSE OSC /1,/2,/4, /8,/16 HPRE PPRE PCLK x1, x2 CKMODE /2, /4 32.
Functional overview STM32F030x4/x6/x8/xC Figure 3. Clock tree of STM32F030xC FLITFCLK I2C1SW 8 MHz HSI RC HSI HSI HSI HCLK SW PLLMUL /1,/2,.. ../16 OSC_IN 4-32 MHz HSE OSC /1,/2,… …/512 /1,/2,/4, /8,/16 HPRE PPRE x1, x2 HSE CKMODE /2, /4 32.
STM32F030x4/x6/x8/xC 3.8 Functional overview Direct memory access controller (DMA) The 5-channel general-purpose DMA manages memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA supports circular buffer management, removing the need for user code intervention when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel.
Functional overview 3.10 STM32F030x4/x6/x8/xC Analog to digital converter (ADC) The 12-bit analog to digital converter has up to 16 external and two internal (temperature sensor, voltage reference measurement) channels and performs conversions in single-shot or scan modes. In scan mode, automatic conversion is performed on a selected group of analog inputs. The ADC can be served by the DMA controller.
STM32F030x4/x6/x8/xC 3.11 Functional overview Timers and watchdogs The STM32F030x4/x6/x8/xC devices include up to five general-purpose timers, two basic timers and one advanced control timer. Table 5 compares the features of the different timers. Table 5.
Functional overview 3.11.2 STM32F030x4/x6/x8/xC General-purpose timers (TIM3, TIM14..17) There are four or five synchronizable general-purpose timers embedded in the STM32F030x4/x6/x8/xC devices (see Table 5 for differences). Each general-purpose timer can be used to generate PWM outputs, or as simple time base. TIM3 STM32F030x4/x6/x8/xC devices feature one synchronizable 4-channel general-purpose timer. TIM3 is based on a 16-bit auto-reload up/downcounter and a 16-bit prescaler.
STM32F030x4/x6/x8/xC Functional overview can be used either as a watchdog to reset the device when a problem occurs, or as a free running timer for application timeout management. It is hardware or software configurable through the option bytes. The counter can be frozen in debug mode. 3.11.5 System window watchdog (WWDG) The system window watchdog is based on a 7-bit downcounter that can be set as free running. It can be used as a watchdog to reset the device when a problem occurs.
Functional overview 3.13 STM32F030x4/x6/x8/xC Inter-integrated circuit interfaces (I2C) Up to two I2C interfaces (I2C1 and I2C2) can operate in multimaster or slave modes. Both can support Standard mode (up to 100 kbit/s) or Fast mode (up to 400 kbit/s). I2C1 also supports Fast Mode Plus (up to 1 Mbit/s), with 20 mA output drive. Both support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses (two addresses, one with configurable mask).
STM32F030x4/x6/x8/xC Functional overview Table 8 gives an overview of features as implemented on the available USART interfaces. All USART interfaces can be served by the DMA controller. Table 8.
Functional overview STM32F030x4/x6/x8/xC Table 9. STM32F030x4/x6/x8/xC SPI implementation(1) SPI1 SPI2(2) Hardware CRC calculation X X Rx/Tx FIFO X X NSS pulse mode X X TI mode X X SPI features 1. X = supported. 2. Not available on STM32F030x4/6. 3.16 Serial wire debug port (SW-DP) An Arm SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU.
STM32F030x4/x6/x8/xC Pinouts and pin descriptions PB7 PB6 PB5 PB4 PB3 PD2 PC12 PC11 PC10 PA15 PA14 PF7 PF6 PA13 PA12 PA11 PA10 PA9 PA8 PC9 PC8 PC7 PC6 PB15 PB14 PB13 PB12 PA4 PA5 PA6 PA7 PC4 PC5 PB0 PB1 PB2 PB10 PB11 VSS VDD 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 1 47 2 46 3 45 4 44 5 43 6 42 7 41 8 LQFP64 40 9 39 10 38 11 37 12 36 13 35 14 34 15 33 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PA3 PF4 PF5 VDD PC13 PC14-OSC32_IN PC15-OSC32_OUT PF0-OSC_IN PF1-OSC_OUT NRST PC0 PC1 PC2
Pinouts and pin descriptions STM32F030x4/x6/x8/xC VDD VSS PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PA15 PA14 Figure 6.
STM32F030x4/x6/x8/xC Pinouts and pin descriptions PB3 PA15 PB4 PB6 PB5 PB7 VSS BOOT0 Figure 8. LQFP32 32-pin package pinout (top view) 32 31 30 29 28 27 26 25 VDD PF0-OSC_IN 1 PF1-OSC_OUT 3 NRST VDDA PA0 PA1 4 PA2 24 23 22 2 21 20 19 18 17 LQFP32 5 6 7 8 PA14 PA13 PA12 PA11 PA10 PA9 PA8 VDD PB1 VSS PB0 PA5 PA6 PA7 PA3 PA4 9 10 11 12 13 14 15 16 MS32144V1 Figure 9.
Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 10. Legend/abbreviations used in the pinout table Name Abbreviation Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name Pin name Pin type I/O structure S Supply pin I Input only pin I/O Input / output pin FT 5 V tolerant I/O FTf 5 V tolerant I/O, FM+ capable TTa 3.3 V tolerant I/O directly connected to ADC TC Standard 3.
STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 11.
Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 11.
STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 11.
Pinouts and pin descriptions STM32F030x4/x6/x8/xC Table 11.
STM32F030x4/x6/x8/xC Pinouts and pin descriptions Table 11.
/93 Table 12.
Pin name AF0 AF1 AF2 AF3 AF4 AF5 AF6 PA12 EVENTOUT USART1_RTS TIM1_ETR - - SDA - PA13 SWDIO IR_OUT - - - - - - - - - - - EVENTOUT USART4_RTS(1) - - USART1_TX(2) PA14 SWCLK PA15 SPI1_NSS USART2_TX(1)(3) USART1_RX(2) USART2_RX(1)(3) 1. This feature is available on STM32F030xC devices. 2. This feature is available on STM32F030x4 and STM32F030x6 devices. DS9773 Rev 4 3. This feature is available on STM32F030x8 devices. Table 13.
/93 Table 13.
STM32F030x4/x6/x8/xC Table 14.
Memory mapping 5 STM32F030x4/x6/x8/xC Memory mapping Figure 10.
STM32F030x4/x6/x8/xC Memory mapping Table 17.
Memory mapping STM32F030x4/x6/x8/xC Table 17.
STM32F030x4/x6/x8/xC Electrical characteristics 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified, the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
Electrical characteristics 6.1.6 STM32F030x4/x6/x8/xC Power supply scheme Figure 13. Power supply scheme LSE, RTC, Wake-up logic Power switch VDD VCORE 2 x VDD Regulator OUT 2 x 100 nF GPIOs IN +1 x 4.7 μF Level shifter VDDIO1 IO logic Kernel logic (CPU, Digital & Memories) 2 x VSS VDDA VDDA 10 nF +1 μF VREF+ VREF- ADC Analog: (RCs, PLL, …) VSSA MSv39025V1 Caution: Each power supply pair (VDD/VSS, VDDA/VSSA etc.) must be decoupled with filtering ceramic capacitors as shown above.
STM32F030x4/x6/x8/xC 6.2 Electrical characteristics Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 18: Voltage characteristics, Table 19: Current characteristics and Table 20: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 18.
Electrical characteristics STM32F030x4/x6/x8/xC Table 19. Current characteristics Symbol Ratings Max.
STM32F030x4/x6/x8/xC Electrical characteristics Table 21. General operating conditions (continued) Symbol VDDA VIN PD Parameter Analog operating voltage I/O input voltage Power dissipation at TA = 85 °C for suffix 6 (1) Conditions Min Max Unit Must have a potential equal to or higher than VDD 2.4 3.6 V TC and RST I/O -0.3 VDDIOx+0.3 TTa I/O -0.3 VDDA+0.3(2) FT and FTf I/O -0.3 5.5(2) BOOT0 0 5.
Electrical characteristics STM32F030x4/x6/x8/xC Table 23. Embedded reset and power control block characteristics (continued) Symbol VPDRhyst tRSTTEMPO(4) Parameter Conditions Min Typ Max Unit PDR hysteresis - - 40 - mV Reset temporization - 1.50 2.50 4.50 ms 1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR detector monitors only VDD. 2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value. 3.
STM32F030x4/x6/x8/xC Electrical characteristics Typical and maximum current consumption The MCU is placed under the following conditions: • All I/O pins are in analog input mode • All peripherals are disabled except when explicitly mentioned • • The Flash memory access time is adjusted to the fHCLK frequency: – 0 wait state and Prefetch OFF from 0 to 24 MHz – 1 wait state and Prefetch ON above 24 MHz When the peripherals are enabled fPCLK = fHCLK The parameters given in Table 25 to Table 27 are
Electrical characteristics STM32F030x4/x6/x8/xC Table 26. Typical and maximum current consumption from the VDDA supply(1) VDDA = 3.6 V Symbol Parameter Conditions(2) fHCLK Typ Max @ TA(3) Unit 85 °C HSE bypass, PLL on IDDA Supply current in Run or Sleep mode, code executing from Flash memory or RAM HSE bypass, PLL off HSI clock, PLL on HSI clock, PLL off 48 MHz 175 215 48 MHz 160 192 8 MHz 3.9 4.9 8 MHz 3.7 4.6 1 MHz 3.9 4.1 1 MHz 3.3 4.
STM32F030x4/x6/x8/xC Electrical characteristics Table 27. Typical and maximum consumption in Stop and Standby modes Symbol IDD Typ @VDD (VDD = VDDA) Max(1) 3.6 V TA = 85 °C Regulator in run mode, all oscillators OFF 19 48 Regulator in low-power mode, all oscillators OFF 5 32 2 - Regulator in run or lowpower mode, all oscillators OFF 2.9 3.5 LSI ON and IWDG ON 3.3 - LSI OFF and IWDG OFF 2.8 3.5 Regulator in run or lowpower mode, all oscillators OFF 1.7 - LSI ON and IWDG ON 2.
Electrical characteristics STM32F030x4/x6/x8/xC Table 28. Typical current consumption in Run mode, code with data processing running from Flash Typ Symbol IDD IDDA Parameter Conditions Supply current in Run Running from mode from VDD HSE crystal supply clock 8 MHz, Supply current in Run code executing mode from VDDA from Flash supply fHCLK Peripherals Peripherals enabled disabled 48 MHz 23.3 11.5 8 MHz 4.5 3.0 48 MHz 158 158 8 MHz 2.43 2.
STM32F030x4/x6/x8/xC Electrical characteristics where ISW is the current sunk by a switching I/O to charge/discharge the capacitive load VDDIOx is the I/O supply voltage fSW is the I/O switching frequency C is the total capacitance seen by the I/O pin: C = CINT + CEXT + CS CS is the PCB board capacitance including the pad pin. The test pin is configured in push-pull output mode and is toggled by software at a fixed frequency. Table 29.
Electrical characteristics STM32F030x4/x6/x8/xC Table 30. Low-power mode wakeup timings Symbol Parameter Typ @VDD = VDDA Conditions Max Unit = 3.3 V tWUSTOP Wakeup from Stop mode Regulator in run mode 2.8 5 - 51 - - 4 SYSCLK cycles - tWUSTANDBY Wakeup from Standby mode tWUSLEEP 6.3.
STM32F030x4/x6/x8/xC Electrical characteristics Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.14. However, the recommended clock input waveform is shown in Figure 16. Table 32. Low-speed external user clock characteristics Parameter(1) Symbol Min Typ Max Unit - 32.
Electrical characteristics STM32F030x4/x6/x8/xC Table 33. HSE oscillator characteristics Symbol Conditions(1) Min(2) Typ Max(2) - - 8.5 VDD = 3.3 V, Rm = 45 Ω, CL = 10 pF@8 MHz - 0.5 - VDD = 3.3 V, Rm = 30 Ω, CL = 20 pF@32 MHz - 1.5 - Startup 10 - - mA/V VDD is stabilized - 2 - ms Parameter During startup IDD gm tSU(HSE)(4) HSE current consumption Oscillator transconductance Startup time (3) Unit mA 1.
STM32F030x4/x6/x8/xC Electrical characteristics obtained with typical external components specified in Table 34. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 34. LSE oscillator characteristics (fLSE = 32.
Electrical characteristics 6.3.8 STM32F030x4/x6/x8/xC Internal clock source characteristics The parameters given in Table 35 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 21: General operating conditions. The provided curves are characterization results, not tested in production. High-speed internal (HSI) RC oscillator Table 35.
STM32F030x4/x6/x8/xC Electrical characteristics Table 37. LSI oscillator characteristics(1) Symbol Parameter tsu(LSI)(2) IDDA(LSI)(2) Min Typ Max Unit LSI oscillator startup time - - 85 µs LSI oscillator power consumption - 0.75 - µA 1. VDDA = 3.3 V, TA = -40 to 85 °C unless otherwise specified. 2. Guaranteed by design, not tested in production. 6.3.
Electrical characteristics STM32F030x4/x6/x8/xC Table 40. Flash memory endurance and data retention Symbol NEND tRET Min(1) Unit TA = -40 to +85 °C 1 kcycle (2) 20 Years Parameter Endurance Data retention Conditions 1 kcycle at TA = 85 °C 1. Data based on characterization results, not tested in production. 2. Cycling performed over the whole temperature range. 6.3.11 EMC characteristics Susceptibility tests are performed on a sample basis during device characterization.
STM32F030x4/x6/x8/xC Electrical characteristics The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical Data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second.
Electrical characteristics STM32F030x4/x6/x8/xC Table 43. ESD absolute maximum ratings Symbol Ratings Conditions Packages Class Maximum value(1) Unit VESD(HBM) Electrostatic discharge voltage TA = +25 °C, conforming (human body model) to JESD22-A114 All 2 2000 V VESD(CDM) Electrostatic discharge voltage TA = +25 °C, conforming (charge device model) to ANSI/ESD STM5.3.1 All C4(2) C3(3) 500(2) 250(3) V 1. Data based on characterization results, not tested in production. 2.
STM32F030x4/x6/x8/xC Electrical characteristics Table 45. I/O current injection susceptibility Functional susceptibility Symbol Description Unit Negative Positive injection injection IINJ 6.3.
Electrical characteristics STM32F030x4/x6/x8/xC Table 46. I/O static characteristics (continued) Symbol Ilkg RPU Parameter Input leakage current(2) Weak pull-up equivalent resistor (4) RPD Weak pull-down equivalent resistor(4) CIO I/O pin capacitance Conditions Min Typ Max TC, FT and FTf I/O TTa in digital mode VSS ≤ VIN ≤ VDDIOx - - ± 0.1 TTa in digital mode VDDIOx ≤ VIN ≤ VDDA - - 1 TTa in analog mode VSS ≤ VIN ≤ VDDA - - ± 0.
STM32F030x4/x6/x8/xC Electrical characteristics Figure 19. TC and TTa I/O input characteristics 3 2.5 TESTED RANGE TTL standard requirement ent) 2 ard tand Ss (CMO VIN (V) 1.5 V IHmin irem requ V DDIOx = 0.7 0.445 VIHmin = VDDIOx + 0.398 UNDEFINED INPUT RANGE 1 3 VDDIOx + VILmax = 0. 0.5 0.07 3 VDDIOx VILmax = 0. TTL standard requirement t) quiremen andard re (CMOS st TESTED RANGE 0 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VDDIOx (V) MSv32130V4 Figure 20.
Electrical characteristics STM32F030x4/x6/x8/xC Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink or source up to +/- 20 mA (with a relaxed VOL/VOH). In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.
STM32F030x4/x6/x8/xC Electrical characteristics Table 48. I/O AC characteristics(1)(2) OSPEEDRy [1:0] value(1) Symbol Parameter Conditions Min Max Unit - 2 MHz - 125 - 125 - 10 - 25 - 25 CL = 30 pF, VDDIOx ≥ 2.7 V - 50 CL = 50 pF, VDDIOx ≥ 2.7 V - 30 CL = 50 pF, 2.4 V ≤VDDIOx < 2.7 V - 20 CL = 30 pF, VDDIOx ≥ 2.7 V - 5 CL = 50 pF, VDDIOx ≥ 2.7 V - 8 CL = 50 pF, 2.4 V ≤VDDIOx < 2.7 V - 12 CL = 30 pF, VDDIOx ≥ 2.7 V - 5 CL = 50 pF, VDDIOx ≥ 2.
Electrical characteristics STM32F030x4/x6/x8/xC Figure 21. I/O AC characteristics definition 10% 90% 50% 50% 10% 90% t f(IO)out t r(IO)out T Maximum frequency is achieved if (t r + t f ) ≤ 2 T and if the duty cycle is (45-55%) 3 when loaded by CL (see the table I/O AC characteristics definition) MS32132V3 6.3.15 NRST pin characteristics The NRST pin input driver uses the CMOS technology. It is connected to a permanent pullup resistor, RPU.
STM32F030x4/x6/x8/xC Electrical characteristics Figure 22. Recommended NRST pin protection External reset circuit(1) VDD RPU NRST(2) Internal reset Filter 0.1 μF(3) MS19878V4 1. The external capacitor protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 49: NRST pin characteristics. Otherwise the reset will not be taken into account by the device. 6.3.
Electrical characteristics STM32F030x4/x6/x8/xC Table 50. ADC characteristics (continued) Symbol Parameter tCAL(2)(3) Conditions Calibration time tlatr(2) JitterADC tS(2) ADC_DR register write latency 5.9 µs - 83 1/fADC 1.5 ADC cycles + 3 fPCLK cycles - ADC clock = PCLK/2 - 4.5 - fPCLK cycle ADC clock = PCLK/4 - 8.5 - fPCLK cycle tCONV(2) fADC = fPCLK/2 = 14 MHz 0.196 µs fADC = fPCLK/2 5.5 1/fPCLK fADC = fPCLK/4 = 12 MHz 0.219 µs fADC = fPCLK/4 10.
STM32F030x4/x6/x8/xC Electrical characteristics Table 51. RAIN max for fADC = 14 MHz Ts (cycles) tS (µs) RAIN max (kΩ)(1) 1.5 0.11 0.4 7.5 0.54 5.9 13.5 0.96 11.4 28.5 2.04 25.2 41.5 2.96 37.2 55.5 3.96 50 71.5 5.11 NA 239.5 17.1 NA 1. Guaranteed by design, not tested in production. Table 52.
Electrical characteristics STM32F030x4/x6/x8/xC Figure 23. ADC accuracy characteristics VSSA EG (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line 4095 4094 4093 ET = total unajusted error: maximum deviation between the actual and ideal transfer curves. EO = offset error: maximum deviation between the first actual transition and the first ideal one. EG = gain error: deviation between the last ideal transition and the last actual one.
STM32F030x4/x6/x8/xC 6.3.17 Electrical characteristics Temperature sensor characteristics Table 53. TS characteristics Symbol Parameter TL(1) Avg_Slope Min Typ Max Unit - ±1 ±2 °C 4.0 4.3 4.6 mV/°C 1.34 1.43 1.52 V VSENSE linearity with temperature (1) V30 Average slope Voltage at 30 °C (± 5 °C) (2) tSTART(1) ADC_IN16 buffer startup time - - 10 µs tS_temp(1) ADC sampling time when reading the temperature 4 - - µs 1. Guaranteed by design, not tested in production. 2.
Electrical characteristics STM32F030x4/x6/x8/xC Table 55. IWDG min/max timeout period at 40 kHz (LSI)(1) Prescaler divider PR[2:0] bits Min timeout RL[11:0]= 0x000 Max timeout RL[11:0]= 0xFFF /4 0 0.1 409.6 /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 6 or 7 6.4 26214.4 Unit ms 1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30 to 60 kHz.
STM32F030x4/x6/x8/xC Electrical characteristics Table 57. I2C analog filter characteristics(1) Symbol Parameter Min Max Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter 50(2) 260(3) ns 1. Guaranteed by design, not tested in production. 2. Spikes with widths below tAF(min) are filtered. 3.
Electrical characteristics STM32F030x4/x6/x8/xC Figure 25. SPI timing diagram - slave mode and CPHA = 0 Figure 26. SPI timing diagram - slave mode and CPHA = 1 NSS input SCK input tSU(NSS) CPHA=1 CPOL=0 CPHA=1 CPOL=1 tw(SCKH) tw(SCKL) th(SO) tv(SO) ta(SO) MISO OUTPUT MSB OUT BIT6 OUT tr(SCK) tf(SCK) tdis(SO) LSB OUT th(SI) tsu(SI) MOSI INPUT th(NSS) tc(SCK) MSB IN BIT 1 IN LSB IN ai14135b 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD.
STM32F030x4/x6/x8/xC Electrical characteristics Figure 27. SPI timing diagram - master mode High NSS input SCK Output CPHA= 0 CPOL=0 SCK Output tc(SCK) CPHA=1 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=1 tsu(MI) MISO INP UT tw(SCKH) tw(SCKL) MSB IN tr(SCK) tf(SCK) BIT6 IN LSB IN th(MI) MOSI OUTPUT MSB OUT B I T1 OUT tv(MO) LSB OUT th(MO) ai14136c 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD.
Package information 7 STM32F030x4/x6/x8/xC Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 7.1 LQFP64 package information LQFP64 is 64-pin, 10 x 10 mm low-profile quad flat package. Figure 28. LQFP64 outline 0.
STM32F030x4/x6/x8/xC Package information Table 59. LQFP64 mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D - 12.000 - - 0.4724 - D1 - 10.000 - - 0.3937 - D3 - 7.500 - - 0.2953 - E - 12.000 - - 0.4724 - E1 - 10.000 - - 0.3937 - E3 - 7.500 - - 0.2953 - e - 0.500 - - 0.0197 - K 0° 3.5° 7° 0° 3.5° 7° L 0.450 0.600 0.750 0.
Package information STM32F030x4/x6/x8/xC Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. The printed markings may differ depending on the supply chain. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 30.
STM32F030x4/x6/x8/xC LQFP48 package information LQFP48 is a 48-pin, 7 x 7 mm low-profile quad flat package Figure 31. LQFP48 outline SEATING PLANE C c A1 A A2 0.25 mm GAUGE PLANE ccc C K D A1 L D1 L1 D3 36 25 37 24 48 E E1 b E3 7.2 Package information 13 PIN 1 IDENTIFICATION 1 12 e 5B_ME_V2 1. Drawing is not to scale. Table 60. LQFP48 mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.
Package information STM32F030x4/x6/x8/xC Table 60. LQFP48 mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.500 - - 0.2165 - e - 0.500 - - 0.0197 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° 3.5° 7° 0° 3.5° 7° ccc - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 32.
STM32F030x4/x6/x8/xC Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. The printed markings may differ depending on the supply chain. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 33.
Package information 7.3 STM32F030x4/x6/x8/xC LQFP32 package information LQFP32 is a 32-pin, 7 x 7 mm low-profile quad flat package Figure 34. LQFP32 outline c A2 A1 A SEATING PLANE C 0.25 mm ccc GAUGE PLANE C K D L A1 D1 L1 D3 24 17 16 32 9 PIN 1 IDENTIFICATION 1 E E1 E3 b 25 8 e 5V_ME_V2 1. Drawing is not to scale. Table 61. LQFP32 mechanical data inches(1) millimeters Symbol 82/93 Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.
STM32F030x4/x6/x8/xC Package information Table 61. LQFP32 mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.2205 - E 8.800 9.000 9.200 0.3465 0.3543 0.3622 E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.600 - - 0.2205 - e - 0.800 - - 0.
Package information STM32F030x4/x6/x8/xC Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. The printed markings may differ depending on the supply chain. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 36.
STM32F030x4/x6/x8/xC 7.4 Package information TSSOP20 package information TSSOP20 is a 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch package. Figure 37. TSSOP20 outline D 20 11 c E1 E 1 SEATING PLANE C 0.25 mm GAUGE PLANE 10 PIN 1 IDENTIFICATION k aaa C A1 A A2 b L L1 e YA_ME_V3 1. Drawing is not to scale. Table 62. TSSOP20 mechanical data inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.200 - - 0.0472 A1 0.050 - 0.150 0.0020 - 0.
Package information STM32F030x4/x6/x8/xC Table 62. TSSOP20 mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. Figure 38. TSSOP20 footprint 0.25 6.25 20 11 1.35 0.25 7.10 4.40 1.35 1 10 0.40 1. Dimensions are expressed in millimeters. 86/93 DS9773 Rev 4 0.
STM32F030x4/x6/x8/xC Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. The printed markings may differ depending on the supply chain. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 39.
Package information 7.5 STM32F030x4/x6/x8/xC Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 21: General operating conditions.
STM32F030x4/x6/x8/xC 8 Ordering information Ordering information + Example: STM32 F 030 C 6 T 6 x Device family STM32 = Arm-based 32-bit microcontroller Product type F = General-purpose Sub-family 030 = STM32F030xx Pin count F = 20 pins K = 32 pins C = 48 pins R = 64 pins Code size 4 = 16 Kbyte of Flash memory 6 = 32 Kbyte of Flash memory 8 = 64 Kbyte of Flash memory C = 256 Kbyte of Flash memory Package P = TSSOP T = LQFP Temperature range 6 = –40 to 85 °C Option xxx = programmed parts TR = ta
Revision history 9 STM32F030x4/x6/x8/xC Revision history Table 64. Document revision history Date Revision 04-Jul-2013 1 Initial release. 2 Extended the applicability to STM32F030xC.
STM32F030x4/x6/x8/xC Revision history Table 64. Document revision history (continued) Date 23-Jan-2017 Revision Changes 3 – Section 3.11.2: General-purpose timers (TIM3, TIM14..
Revision history STM32F030x4/x6/x8/xC Table 64. Document revision history (continued) Date 15-Jan-2019 92/93 Revision Changes 4 – Figure 2 split in two figures – TIM15 complementary outputs count in Table 5 – Periodic wakeup unit feature in Section 3.
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