Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 128KB LQFP

This is information on a product in full production.

June 2015 DocID16455 Rev 8 1/95

STM32F100x4 STM32F100x6

STM32F100x8 STM32F100xB

Low & medium-density value line, advanced ARM

-based 32-bit MCU

with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces

Datasheet - production data

Features

• Core: ARM

32-bit Cortex

-M3

CPU

– 24 MHz maximum frequency,

1.25 DMIPS/MHz (Dhrystone 2.1)

performance

– Single-cycle multiplication and hardware

division

• Memories

– 16 to 128 Kbytes of Flash memory

– 4 to 8 Kbytes of SRAM

• Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR and programmable voltage

detector (PVD)

– 4-to-24 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC

– PLL for CPU clock

– 32 kHz oscillator for RTC with calibration

• Low power

– Sleep, Stop and Standby modes

–V

BAT

supply for RTC and backup registers

• Debug mode

– Serial wire debug (SWD) and JTAG

interfaces

• DMA

– 7-channel DMA controller

– Peripherals supported: timers, ADC, SPIs,

Cs, USARTs and DACs

• 1 × 12-bit, 1.2 µs A/D converter (up to 16

channels)

– Conversion range: 0 to 3.6 V

– Temperature sensor

• 2 × 12-bit D/A converters

• Up to 80 fast I/O ports

– 37/51/80 I/Os, all mappable on 16 external

interrupt vectors and almost all 5 V-tolerant

• Up to 12 timers

– Up to three 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter

– 16-bit, 6-channel advanced-control timer:

up to 6 channels for PWM output, dead

time generation and emergency stop

– One 16-bit timer, with 2 IC/OC, 1

OCN/PWM, dead-time generation and

emergency stop

– Two 16-bit timers, each with

IC/OC/OCN/PWM, dead-time generation

and emergency stop

– 2 watchdog timers (Independent and

Window)

– SysTick timer: 24-bit downcounter

– Two 16-bit basic timers to drive the DAC

• Up to 8 communications interfaces

– Up to two I

C interfaces (SMBus/PMBus)

– Up to 3 USARTs (ISO 7816 interface, LIN,

IrDA capability, modem control)

– Up to 2 SPIs (12 Mbit/s)

– Consumer electronics control (CEC)

interface

• CRC calculation unit, 96-bit unique ID

• ECOPACK

packages

Table 1. Device summary

Reference Part number

STM32F100x4 STM32F100C4, STM32F100R4

STM32F100x6 STM32F100C6, STM32F100R6

STM32F100x8

STM32F100C8, STM32F100R8,

STM32F100V8

STM32F100xB

STM32F100CB, STM32F100RB,

STM32F100VB

)%*$

LQFP100 14 × 14 mm

LQFP64 10 × 10 mm

LQFP48 7 × 7 mm

TFBGA64 5 × 5 mm

www.st.com

Summary of content (95 pages)

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STM32F100x4 STM32F100x6 STM32F100x8 STM32F100xB Low & medium-density value line, advanced ARM®-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces Datasheet - production data Features • Core: ARM® 32-bit Cortex®-M3 CPU – 24 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance – Single-cycle multiplication and hardware division • Memories – 16 to 128 Kbytes of Flash memory – 4 to 8 Kbytes of SRAM • Clock, reset and supply management – 2.0 to 3.
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Contents STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1 6 Contents Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1.
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Contents STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 6.5 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.6 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.6.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.6.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . . 89 7 Ordering information scheme .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43.
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List of tables Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. 6/95 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39.
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List of figures Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. 8/95 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB LQFP64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid array package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 1 Introduction Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F100x4, STM32F100x6, STM32F100x8 and STM32F100xB microcontrollers. In the rest of the document, the STM32F100x4 and STM32F100x6 are referred to as lowdensity devices while the STM32F100x8 and STM32F100xB are identified as mediumdensity devices.
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Description 2 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description The STM32F100x4, STM32F100x6, STM32F100x8 and STM32F100xB microcontrollers incorporate the high-performance ARM® Cortex®-M3 32-bit RISC core operating at a 24 MHz frequency, high-speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 8 Kbytes), and an extensive range of enhanced peripherals and I/Os connected to two APB buses.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.1 Description Device overview The description below gives an overview of the complete range of peripherals proposed in this family. Figure 1 shows the general block diagram of the device family. Table 2.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 1. STM32F100xx value line block diagram .*4234 *4$) *4#+ 37#,+ *4-3 37$)/ *4$/ AS !& *4!' 37 4RACE CONTROLLER PBUS )BUS #ORTEX - #05 FMAX -(Z 6OLTAGE REG 6 TO 6 &LASH +" .6)# '0 $-! 32! +" 6$$! 0/2 2ESET 3UPPLY SUPERVISION )NT 0/2 0$2 2# (3 6$$! CHANNELS 0!; = '0)/ PORT ! 0"; = '0)/ PORT " !(" & MAX -(Z %84 ) 4 7+50 6$$ 84!, /3# -(Z 0,, !& 633 .
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description Figure 2.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2 Overview 2.2.1 ARM® Cortex®-M3 core with embedded Flash and SRAM The ARM® Cortex®-M3 processor is the latest generation of ARM processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2.6 Description External interrupt/event controller (EXTI) The external interrupt/event controller consists of 18 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB higher than the VPVD threshold. The interrupt service routine can then generate a warning message and/or put the MCU into a safe state. The PVD is enabled by software. 2.2.11 Voltage regulator The regulator has three operation modes: main (MR), low power (LPR) and power down.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel. Configuration is made by software and transfer sizes between source and destination are independent. The DMA can be used with the main peripherals: SPI, DAC, I2C, USART, all timers and ADC. 2.2.
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Description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 channels. It has complementary PWM outputs with programmable inserted dead times. It can also be seen as a complete general-purpose timer.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Description Their counters can be frozen in debug mode. Basic timers TIM6 and TIM7 These timers are mainly used for DAC trigger generation. They can also be used as a generic 16-bit time base. Independent watchdog The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is clocked from an independent 40 kHz internal RC and as it operates independently from the main clock, it can operate in Stop and Standby modes.
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Description 2.2.18 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Serial peripheral interface (SPI) Up to two SPIs are able to communicate up to 12 Mbit/s in slave and master modes in fullduplex and simplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits. Both SPIs can be served by the DMA controller. 2.2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 2.2.23 Description DAC (digital-to-analog converter) The two 12-bit buffered DAC channels can be used to convert two digital signals into two analog voltage signal outputs. The chosen design structure is composed of integrated resistor strings and an amplifier in noninverting configuration.
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Pinouts and pin description 3 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 VDD_3 VSS_3 PE1 PE0 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 PC12 PC11 PC10 PA15 PA14 Figure 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description VDD_3 VSS_3 PB9 PB8 BOOT0 PB7 PB6 PB5 PB4 PB3 PD2 PC12 PC11 PC10 PA15 PA14 Figure 4.
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Pinouts and pin description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 6.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description Table 4.
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Pinouts and pin description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 4.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description Table 4.
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Pinouts and pin description STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 4.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Pinouts and pin description 1. I = input, O = output, S = supply, HiZ= high impedance. 2. FT= 5 V tolerant. 3. Function availability depends on the chosen device. For devices having reduced peripheral counts, it is always the lower number of peripherals that is included. For example, if a device has only one SPI, two USARTs and two timers, they will be called SPI1, USART1 & USART2 and TIM2 & TIM 3, respectively. Refer to Table 2 on page 11. 4.
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Memory mapping 4 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Memory mapping The memory map is shown in Figure 7. Figure 7. Memory map $3% PHPRU\ VSDFH [)))) )))) [ [ [ [)))) )))) [ [ [( [( 5&& UHVHUYHG [ 7,0 [ 7,0 [ ))) )))) UHVHUYHG [ ))) ) ) 2SWLRQ %\WHV [ [ ))) ) 6\VWHP PHPRU\ [ ))) ) [ 86$57 [ UHVHUYHG [ 63, 3HULSKHUDO
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5 Electrical characteristics 5.1 Parameter conditions Electrical characteristics Unless otherwise specified, all voltages are referenced to VSS. 5.1.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 8. Pin loading conditions Figure 9. Pin input voltage STM32F10xxx pin STM32F10xxx pin C = 50 pF VIN ai14124b ai14123b 5.1.6 Power supply scheme Figure 10. Power supply scheme 6"!4 "ACKUP CIRCUITRY /3# + 24# 7AKE UP LOGIC "ACKUP REGISTERS /54 '0 ) /S ).
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.1.7 Electrical characteristics Current consumption measurement Figure 11. Current consumption measurement scheme IDD_VBAT VBAT IDD VDD VDDA ai14126 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 5: Voltage characteristics, Table 6: Current characteristics, and Table 7: Thermal characteristics may cause permanent damage to the device.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 6. Current characteristics Symbol IVDD IVSS IIO Ratings Max.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Table 8.
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Electrical characteristics . STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 10. Embedded reset and power control block characteristics Symbol VPVD VPVDhyst(2) Parameter Conditions Programmable voltage detector level selection Min Typ Max Unit PLS[2:0]=000 (rising edge) 2.1 2.18 2.26 V PLS[2:0]=000 (falling edge) 2 2.08 2.16 V PLS[2:0]=001 (rising edge) 2.19 2.28 2.37 V PLS[2:0]=001 (falling edge) 2.09 2.18 2.27 V PLS[2:0]=010 (rising edge) 2.28 2.38 2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.4 Electrical characteristics Embedded reference voltage The parameters given in Table 11 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 11. Embedded internal reference voltage Symbol VREFINT Parameter Internal reference voltage Conditions Min Typ –40 °C < TA < +105 °C 1.16 1.20 1.26 V –40 °C < TA < +85 °C 1.16 1.20 1.24 V - - 5.1 17.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 12. Maximum current consumption in Run mode, code with data processing running from Flash Max(1) Symbol IDD Parameter Supply current in Run mode Conditions External clock (2), all peripherals enabled External clock(2), all peripherals disabled fHCLK Unit TA = 85 °C TA = 105 °C 24 MHz 15.4 15.7 16 MHz 11 11.5 8 MHz 6.7 6.9 24 MHz 10.3 10.5 16 MHz 7.8 8.1 8 MHz 5.1 5.3 mA 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 12. Maximum current consumption in Run mode versus frequency (at 3.6 V) code with data processing running from RAM, peripherals enabled #ONSUMPTION M! -(Z -(Z -(Z n # # # # 4EMPERATURE # AI Figure 13. Maximum current consumption in Run mode versus frequency (at 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 15. Typical and maximum current consumptions in Stop and Standby modes Typ(1) Symbol VDD/ VBAT = 2.0 V VDD/ VBAT = 2.4 V VDD/ VBAT = 3.3 V Regulator in Run mode, Low-speed and high-speed internal RC oscillators and high-speed oscillator OFF (no independent watchdog) - 23.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 15. Typical current consumption in Stop mode with regulator in Run mode versus temperature at VDD = 3.3 V and 3.6 V 6 6 n # # # 4EMPERATURE # # AI Figure 16. Typical current consumption in Stop mode with regulator in Low-power mode versus temperature at VDD = 3.3 V and 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 17. Typical current consumption in Standby mode versus temperature at VDD = 3.3 V and 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Table 16. Typical current consumption in Run mode, code with data processing running from Flash Typical values(1) Symbol Parameter IDD Supply current in Run mode Conditions fHCLK All peripherals All peripherals enabled(2) disabled 24 MHz 12.8 9.3 16 MHz 9.3 6.6 8 MHz 5.1 3.9 Running on high-speed 4 MHz external clock with an 2 MHz 8 MHz crystal(3) 3.2 2.5 2.1 1.75 1 MHz 1.55 1.4 500 kHz 1.3 1.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 17. Typical current consumption in Sleep mode, code running from Flash or RAM Typical values(1) Symbol Parameter Conditions Running on high-speed external clock with an 8 MHz crystal(3) Supply current in Sleep mode IDD Running on high-speed internal RC (HSI) fHCLK All peripherals All peripherals enabled(2) disabled 24 MHz 7.3 2.6 16 MHz 5.2 2 8 MHz 2.8 1.3 4 MHz 2 1.1 2 MHz 1.5 1.1 1 MHz 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Table 18. Peripheral current consumption(1) Current consumption (µA/MHz) Peripheral AHB (up to 24MHz) APB1 (up to 24MHz) DMA1 22.92 CRC 2,08 BusMatrix(2) 4,17 APB1-Bridge 2,92 TIM2 18,75 TIM3 17,92 TIM4 18,33 TIM6 5,00 TIM7 5,42 SPI2/I2S2 4,17 USART2 12,08 USART3 12,92 I2C1 10,83 I2C2 10,83 CEC 5,83 (3) APB2 (up to 24MHz) DAC 8,33 WWDG 2,50 PWR 2,50 BKP 3,33 IWDG 7,50 APB2-Bridge 3.
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Electrical characteristics 5.3.6 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB External clock source characteristics High-speed external user clock generated from an external source The characteristics given in Table 19 result from tests performed using an high-speed external clock source, and under the ambient temperature and supply voltage conditions summarized in Table 8. Table 19.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics 1. Guaranteed by design, not tested in production. Figure 18. High-speed external clock source AC timing diagram VHSEH 90% VHSEL 10% tr(HSE) tf(HSE) tW(HSE) tW(HSE) t THSE External clock source fHSE_ext OSC _IN IL STM32F10xxx ai14127b Figure 19.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 21. HSE 4-24 MHz oscillator characteristics(1)(2) Symbol fOSC_IN RF Parameter Conditions Min Typ Max Unit Oscillator frequency - 4 8 24 MHz Feedback resistor - - 200 - kΩ Recommended load capacitance versus equivalent serial resistance of the crystal (RS)(4) RS = 30 Ω - 30 - pF i2 HSE driving current VDD = 3.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 22.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 21. Typical application with a 32.768 kHz crystal Resonator with integrated capacitors CL1 fLSE OSC32_IN 32.768 KH z resonator Bias controlled gain RF STM32F10xxx OSC32_OU T CL2 ai14129b 5.3.7 Internal clock source characteristics The parameters given in Table 23 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Low-speed internal (LSI) RC oscillator Table 24. LSI oscillator characteristics (1) Symbol Parameter fLSI Frequency (2) ΔfLSI(T) tsu(LSI) Min Typ Max Unit 30 40 60 kHz Temperature-related frequency drift -9 - 9 % (3) LSI oscillator startup time - - 85 µs (3) LSI oscillator power consumption - 0.65 1.2 µA IDD(LSI) 1. VDD = 3 V, TA = –40 to 105 °C °C unless otherwise specified. 2.
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Electrical characteristics 5.3.8 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB PLL characteristics The parameters given in Table 26 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 26. PLL characteristics Value Symbol Parameter Unit Min(1) Typ Max(1) PLL input clock(2) 1 8.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.9 Electrical characteristics Memory characteristics Flash memory The characteristics are given at TA = –40 to 105 °C unless otherwise specified. Table 27. Flash memory characteristics Symbol Parameter Conditions Min(1) Typ Max(1) Unit tprog 16-bit programming time TA = –40 to +105 °C 40 52.
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Electrical characteristics 5.3.10 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB EMC characteristics Susceptibility tests are performed on a sample basis during device characterization. Functional EMS (Electromagnetic susceptibility) While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the device is stressed by two electromagnetic events until a failure occurs.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application is executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with IEC 61967-2 standard which specifies the test board and the pin loading. Table 30. EMI characteristics Symbol Parameter SEMI 5.3.11 Peak level Conditions Monitored frequency band Max vs.
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Electrical characteristics 5.3.12 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product operation.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.13 Electrical characteristics I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 34 are derived from tests performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL compliant. Table 34. I/O static characteristics Symbol VIL Parameter Conditions Min Typ Max –0.3 - 0.28*(VDD–2 V)+0.8 V –0.3 - 0.32*(VDD–2 V)+0.75 V 0.41*(VDD–2 V) +1.3 V - VDD+0.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 22. Standard I/O input characteristics - CMOS port 6)( 6), 6 6 $$ T 6 )( D /3 STAN #- 7)(MIN )NPUT RANGE NOT GUARANTEED 6 6), $$ T 6 ), 6 $$ RD REQUIREMEN #-/3 STANDA 7),MAX 6 6 )( $$ IREMEN ARD REQU 6$$ 6 AI B Figure 23.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 24. 5 V tolerant I/O input characteristics - CMOS port 6)( 6), 6 NDARD -/3 STA 6 $$ ENTS 6 )( REQUIREM # 6 ), 6 $$ 6 $$ QUIRMENT 6 ), DARD RE #-/3 STAN 6 )( 6 $$ )NPUT RANGE NOT GUARANTEED 6$$ 6 6$$ AI B Figure 25.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Output voltage levels Unless otherwise specified, the parameters given in Table 35 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. All I/Os are CMOS and TTL compliant. Table 35.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 26 and Table 36, respectively. Unless otherwise specified, the parameters given in Table 36 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. Table 36.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 26. I/O AC characteristics definition 90% 10% 50% 50% 90% 10% tr(I O)out EXT ERNAL OUTPUT ON 50pF tr(I O)out T Maximum frequency is achieved if (tr + tf) 2/3)T and if the duty cycle is (45-55%) when loaded by 50pF ai14131 5.3.14 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 34).
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.15 Electrical characteristics TIMx characteristics The parameters given in Table 38 are guaranteed by design. Refer to Section 5.3.12: I/O current injection characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). Table 38. TIMx characteristics Symbol Conditions(1) Min Max Unit - 1 - tTIMxCLK fTIMxCLK = 24 MHz 41.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 39. I2C characteristics Standard mode I2C(1) Fast mode I2C(1)(2) Symbol Parameter Unit Min Max Min Max tw(SCLL) SCL clock low time 4.7 - 1.3 - tw(SCLH) SCL clock high time 4.0 - 0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 28. I2C bus AC waveforms and measurement circuit(1) 6$$ K7 6$$ K7 7 34- & X 3$! 7 )£# BUS 3#, 3TART REPEATED 3TART 3TART TSU 34! 3$! TF 3$! TR 3$! TH 34! TSU 3$! TW 3#,, TH 3$! TSU 34/ 34! 3TOP 3#, TW 3#,( TR 3#, TF 3#, TSU 34/ AI D 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. Table 40. SCL frequency (fPCLK1= 24 MHz, VDD = 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB SPI interface characteristics Unless otherwise specified, the parameters given in Table 41 are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 8. Refer to Section 5.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 41.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 29. SPI timing diagram - slave mode and CPHA = 0 NSS input tc(SCK) th(NSS) SCK Input tSU(NSS) CPHA= 0 CPOL=0 tw(SCKH) tw(SCKL) CPHA= 0 CPOL=1 tv(SO) ta(SO) MISO OUT P UT tr(SCK) tf(SCK) th(SO) MS B O UT BI T6 OUT tdis(SO) LSB OUT tsu(SI) MOSI I NPUT B I T1 IN M SB IN LSB IN th(SI) ai14134c Figure 30.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 31. SPI timing diagram - master mode(1) High NSS input SCK output SCK output tc(SCK) CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 tsu(MI) MISO INP UT tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) MS BIN BI T6 IN LSB IN th(MI) MOSI OUTUT M SB OUT B I T1 OUT tv(MO) LSB OUT th(MO) ai14136 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Table 42. ADC characteristics Symbol Parameter Conditions Min Typ Max Unit VDDA Power supply - 2.4 - 3.6 V VREF+ Positive reference voltage - 2.4 - VDDA V IVREF Current on the VREF input pin - - 160(1) 220(1) µA fADC ADC clock frequency - 0.6 - 12 MHz fS(2) Sampling rate - 0.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 43. RAIN max for fADC = 12 MHz(1) Ts (cycles) tS (µs) RAIN max (kΩ) 1.5 0.125 0.4 7.5 0.625 5.9 13.5 1.125 11.4 28.5 2.375 25.2 41.5 3.45 37.2 55.5 4.625 50 71.5 5.96 NA 239.5 20 NA 1. Guaranteed by design, not tested in production. Table 44.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics Figure 32. ADC accuracy characteristics V V [1LSBIDEAL = REF+ (or DDA depending on package)] 4096 4096 EG (1) Example of an actual transfer curve (2) The ideal transfer curve (3) End point correlation line 4095 4094 4093 (2) ET 7 (1) 6 5 4 ET=Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO=Offset Error: deviation between the first actual transition and the first ideal one.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 34. Power supply and reference decoupling (VREF+ not connected to VDDA) STM32F10xxx V REF+ 1 µF // 10 nF V DDA 1 µF // 10 nF V SSA/V REF- ai14380b 1. VREF+ is available on 100-pin packages and on TFBGA64 packages. VREF- is available on 100-pin packages only. Figure 35. Power supply and reference decoupling (VREF+ connected to VDDA) STM32F10xxx VREF+/VDDA 1 µF // 10 nF VREF–/VSSA ai14381b 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.18 Electrical characteristics DAC electrical specifications Table 46. DAC characteristics Symbol Parameter Min Typ Max(1) Unit Comments VDDA Analog supply voltage 2.4 - 3.6 V - VREF+ Reference supply voltage 2.4 - 3.
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Electrical characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 46. DAC characteristics (continued) Symbol Offset(3) Gain error(3) Parameter Min Typ Max(1) Unit Comments - - ±10 mV Offset error (difference between measured value at Code (0x800) and the ideal value = VREF+/2) Given for the DAC in 12-bit configuration - - ±3 LSB Given for the DAC in 10-bit at VREF+ = 3.6 V - - ±12 LSB Given for the DAC in 12-bit at VREF+ = 3.6 V Gain error - - ±0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 5.3.19 Electrical characteristics Temperature sensor characteristics Table 47. TS characteristics Symbol TL(1) Min Typ Max Unit - ±1 ±2 °C Average slope 4.0 4.3 4.6 mV/°C Voltage at 25°C 1.32 1.41 1.50 V Startup time 4 - 10 µs ADC sampling time when reading the temperature - - 17.1 µs VSENSE linearity with temperature Avg_Slope (1) V25(1) tSTART(2) TS_temp Parameter (3)(2) 1.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 6 Package characteristics 6.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 6.2 LQFP100 package information Figure 37.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Table 48. LQPF100 - 100-pin, 14 x 14 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 15.800 16.000 16.200 0.6220 0.6299 0.6378 D1 13.800 14.000 14.200 0.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Figure 38. LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat recommended footprint AI C 1. Dimensions are expressed in millimeters. Device marking for LQFP100 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Figure 39.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB LQFP64 package information Figure 40.LQFP64 – 10 x 10 mm 64 pin low-profile quad flat package outline PP *$8*( 3/$1( F $ $ 6($7,1* 3/$1( & $ $ FFF & ' ' ' . / / 3,1 ,'(17,),&$7,21 ( ( E ( 6.3 Package characteristics H :B0(B9 1. Drawing is not in scale. Table 49.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 49. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max e - 0.500 - - 0.0197 - K 0° 3.5° 7° 0° 3.5° 7° L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - ccc - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 41.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Device marking for LQFP64 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Figure 42. LQFP64 marking example (package top view) $GGLWLRQDO ,QIRUPDWLRQ 3URGXFW LGHQWLILFDWLRQ ) 5 7 % < :: 3LQ LGHQWLILHU 'DWH FRGH 06Y 9 1.
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Package characteristics 6.4 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB TFBGA64 package information Figure 43. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid array package outline ( $ ( ) H + ) ' ' E EDOOV HHH 0 & % $ III 0 & $ % H $ EDOO LQGH[ DUHD 723 9,(: $ EDOO LGHQWLILHU %27720 9,(: & 6HDWLQJ SODQH GGG & $ $ $ $ 6,'( 9,(: 5 B0(B9 1. Drawing is not to scale. Table 50. TFBGA64 – 64-ball, 5 x 5 mm, 0.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Table 50. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid array package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max E1 - 3.500 - - 0.1378 - e - 0.500 - - 0.0197 - F - 0.750 - - 0.0295 - ddd - - 0.080 - - 0.0031 eee - - 0.150 - - 0.0059 fff - - 0.050 - - 0.0020 1.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Device marking for TFBGA64 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 45. TFBGA64 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ ) % 'DWH FRGH < :: $GGLWLRQDO ,QIRUPDWLRQ %DOO LGHQWLILHU = 06Y 9 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB LQFP48 package information Figure 46. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline 3%!4).' 0,!.% # C ! ! ! MM '!5'% 0,!.% CCC # $ + ! $ , , $ % % B % 6.5 Package characteristics 0). )$%.4)&)#!4)/. E "?-%?6 1. Drawing is not to scale. Table 52.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 52. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max E1 6.800 7.000 7.200 0.2677 0.2756 0.2835 E3 - 5.500 - - 0.2165 - e - 0.500 - - 0.0197 - L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - k 0° 3.5° 7° 0° 3.5° 7° ccc - - 0.080 - - 0.0031 1.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Package characteristics Device marking for LQFP48 The following figure gives an example of topside marking orientation versus pin 1 identifier location. Figure 48. LQFP48 marking example (package top view) 3URGXFW LGHQWLILFDWLRQ ) &%7 % 'DWH FRGH < :: 3LQ LGHQWLILHU $GGLWLRQDO LQIRUPDWLRQ = 06Y 9 1.
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Package characteristics 6.6 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 8: General operating conditions on page 34.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 6.6.2 Package characteristics Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Table 54: Ordering information scheme. Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum dissipation and, to a specific maximum junction temperature.
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Package characteristics STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Using the values obtained in Table 53 TJmax is calculated as follows: – For LQFP100, 46 °C/W TJmax = 115 °C + (46 °C/W × 134 mW) = 115 °C + 6.2 °C = 121.2 °C This is within the range of the suffix 7 version parts (–40 < TJ < 125 °C). In this case, parts must be ordered at least with the temperature range suffix 7 (see Table 54: Ordering information scheme). Figure 49. LQFP100 PD max vs.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB 7 Ordering information scheme Ordering information scheme Table 54.
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Revision history 8 STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Revision history Table 55. Document revision history Date Revision 12-Oct-2009 1 Initial release. 2 TFBGA64 package added (see Table 50 and Table 41). Note 5 modified in Table 4: Low & medium-density STM32F100xx pin definitions. IINJ(PIN) modified in Table 6: Current characteristics. Conditions removed from Table 25: Low-power mode wakeup timings. Notes modified in Table 34: I/O static characteristics.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Revision history Table 55. Document revision history (continued) Date Revision Changes 3 Revision history corrected. Updated Table 6: Current characteristics Values and note updated in Table 16: Typical current consumption in Run mode, code with data processing running from Flash and Table 17: Typical current consumption in Sleep mode, code running from Flash or RAM.
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Revision history STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Table 55. Document revision history (continued) Date 08-Jun-2012 08-Jun-2015 94/95 Revision Changes 7 Updated Table 6: Current characteristics on page 34 Updated Table 39: I2C characteristics on page 64 Corrected note “non-robust “ in Section 5.3.17: 12-bit ADC characteristics on page 68 Updated Section 5.3.13: I/O port characteristics on page 57 Updated Section 2.2.
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.