Datasheet

ManualsBrandsST ManualsEmbedded Processors & ControllersMicrocontroller 32bit 32KB LQFP

This is information on a product in full production.

June 2015 DocID15060 Rev 7 1/99

STM32F103x4

STM32F103x6

Low-density performance line, ARM-based 32-bit MCU with 16 or

32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 com. interfaces

Datasheet − production data

Features

• ARM 32-bit Cortex™-M3 CPU Core

– 72 MHz maximum frequency,

1.25 DMIPS/MHz (Dhrystone 2.1)

performance at 0 wait state memory

access

– Single-cycle multiplication and hardware

division

• Memories

– 16 or 32 Kbytes of Flash memory

– 6 or 10 Kbytes of SRAM

• Clock, reset and supply management

– 2.0 to 3.6 V application supply and I/Os

– POR, PDR, and programmable voltage

detector (PVD)

– 4-to-16 MHz crystal oscillator

– Internal 8 MHz factory-trimmed RC

– Internal 40 kHz RC

– PLL for CPU clock

– 32 kHz oscillator for RTC with calibration

• Low power

– Sleep, Stop and Standby modes

–V

BAT

supply for RTC and backup registers

• 2 x 12-bit, 1 µs A/D converters (up to 16

channels)

– Conversion range: 0 to 3.6 V

– Dual-sample and hold capability

– Temperature sensor

• DMA

– 7-channel DMA controller

– Peripherals supported: timers, ADC, SPIs,

Cs and USARTs

• Up to 51 fast I/O ports

– 26/37/51 I/Os, all mappable on 16 external

interrupt vectors and almost all 5 V-tolerant

• Debug mode

– Serial wire debug (SWD) & JTAG

interfaces

• 6 timers

– Two 16-bit timers, each with up to 4

IC/OC/PWM or pulse counter and

quadrature (incremental) encoder input

– 16-bit, motor control PWM timer with dead-

time generation and emergency stop

– 2 watchdog timers (Independent and

Window)

– SysTick timer 24-bit downcounter

• 6 communication interfaces

– 1 x I

C interface (SMBus/PMBus)

– 2 × USARTs (ISO 7816 interface, LIN, IrDA

capability, modem control)

– 1 × SPI (18 Mbit/s)

– CAN interface (2.0B Active)

– USB 2.0 full-speed interface

• CRC calculation unit, 96-bit unique ID

• Packages are ECOPACK

•

Table 1. Device summary

Reference Part number

STM32F103x4

STM32F103C4, STM32F103R4,

STM32F103T4

STM32F103x6

STM32F103C6, STM32F103R6,

STM32F103T6

)%*$

LQFP64 (10 × 10 mm)

LQFP48 (7 × 7mm)

VFQFPN36 (6 × 6 mm)

UFQFPN48 (7 × 7 mm)

TFBGA64 (5 × 5 mm)

www.st.com

Summary of content (99 pages)

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STM32F103x4 STM32F103x6 Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 com. interfaces Datasheet − production data Features • ARM 32-bit Cortex™-M3 CPU Core – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.
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Contents STM32F103x4, STM32F103x6 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2.2 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.3 Overview . . . .
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STM32F103x4, STM32F103x6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1 6 Contents Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 5.1.3 Typical curves . . . . . . . . . . . .
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Contents STM32F103x4, STM32F103x6 6.5 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 6.6 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 6.6.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 6.6.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . . 93 7 Ordering information scheme . . . . . . . . . . . . . .
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STM32F103x4, STM32F103x6 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Device summary . . . . . . . . .
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List of tables Table 44. Table 45. Table 46. Table 47. Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. 6/10 STM32F103x4, STM32F103x6 USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 USB: Full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 ADC characteristics . . . . . . . . . . . . . . . . . . .
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STM32F103x4, STM32F103x6 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40.
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List of figures Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Figure 47. Figure 48. Figure 49. Figure 50. Figure 51. Figure 52. Figure 53. 8/10 STM32F103x4, STM32F103x6 UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package recommended footprint . . . .
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STM32F103x4, STM32F103x6 1 Introduction Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F103x4 and STM32F103x6 low-density performance line microcontrollers. For more details on the whole STMicroelectronics STM32F103xx family, please refer to Section 2.2: Full compatibility throughout the family. The low-density STM32F103xx datasheet should be read in conjunction with the low-, medium- and high-density STM32F10xxx reference manual.
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Description 2 STM32F103x4, STM32F103x6 Description The STM32F103x4 and STM32F103x6 performance line family incorporates the highperformance ARM® Cortex™-M3 32-bit RISC core operating at a 72 MHz frequency, highspeed embedded memories (Flash memory up to 32 Kbytes and SRAM up to 6 Kbytes), and an extensive range of enhanced I/Os and peripherals connected to two APB buses.
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STM32F103x4, STM32F103x6 Device overview Table 2. STM32F103xx low-density device features and peripheral counts STM32F103Tx STM32F103Cx STM32F103Rx Flash - Kbytes 16 32 16 32 16 32 SRAM - Kbytes 6 10 6 10 6 10 2 2 2 2 2 2 Timers Peripheral Communication 2.
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Description STM32F103x4, STM32F103x6 Figure 1. STM32F103xx performance line block diagram 37 *4!' )BU S #ORTEX - #05 &MAX - (Z .6)# 4RA CE #ONTROLLE R PBU S 4RACE TRIG &LASH OBL INTERFACE $BUS 3YST EM !(" & MAX -(Z CHANNELS 6$$! 3500,9 350%26)3)/. 2ST 06$ )NT '0)/! 0"; = '0)/" 0#; = '0)/# 0$; = '0)/$ #HANNELS COMPL CHANNELS %42 AND "+). 4)- -/3) -)3/ 3#+ .
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STM32F103x4, STM32F103x6 Description Figure 2.
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Description 2.2 STM32F103x4, STM32F103x6 Full compatibility throughout the family The STM32F103xx is a complete family whose members are fully pin-to-pin, software and feature compatible. In the reference manual, the STM32F103x4 and STM32F103x6 are identified as low-density devices, the STM32F103x8 and STM32F103xB are referred to as medium-density devices, and the STM32F103xC, STM32F103xD and STM32F103xE are referred to as high-density devices.
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STM32F103x4, STM32F103x6 Description 2.3 Overview 2.3.1 ARM® Cortex™-M3 core with embedded Flash and SRAM The ARM® Cortex™-M3 processor is the latest generation of ARM® processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts.
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Description STM32F103x4, STM32F103x6 This hardware block provides flexible interrupt management features with minimal interrupt latency. 2.3.6 External interrupt/event controller (EXTI) The external interrupt/event controller consists of 19 edge detector lines used to generate interrupt/event requests. Each line can be independently configured to select the trigger event (rising edge, falling edge, both) and can be masked independently. A pending register maintains the status of the interrupt requests.
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STM32F103x4, STM32F103x6 Description in reset mode when VDD is below a specified threshold, VPOR/PDR, without the need for an external reset circuit. The device features an embedded programmable voltage detector (PVD) that monitors the VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is higher than the VPVD threshold.
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Description 2.3.13 STM32F103x4, STM32F103x6 DMA The flexible 7-channel general-purpose DMA is able to manage memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports circular buffer management avoiding the generation of interrupts when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel.
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STM32F103x4, STM32F103x6 Description Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6 channels. It has complementary PWM outputs with programmable inserted dead-times. It can also be seen as a complete general-purpose timer.
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Description STM32F103x4, STM32F103x6 SysTick timer This timer is dedicated for OS, but could also be used as a standard downcounter. It features: 2.3.16 • A 24-bit downcounter • Autoreload capability • Maskable system interrupt generation when the counter reaches 0 • Programmable clock source I²C bus The I²C bus interface can operate in multimaster and slave modes. It can support standard and fast modes. It supports dual slave addressing (7-bit only) and both 7/10-bit addressing in master mode.
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STM32F103x4, STM32F103x6 2.3.21 Description GPIOs (general-purpose inputs/outputs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high currentcapable.
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Pinouts and pin description 3 STM32F103x4, STM32F103x6 Pinouts and pin description s ͺϯ s^^ͺϯ W ϵ W ϴ KK d Ϭ W ϳ W ϲ W ϱ W ϰ W ϯ W Ϯ W ϭϮ W ϭϭ W ϭϬ W ϭϱ W ϭϰ Figure 3.
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STM32F103x4, STM32F103x6 Pinouts and pin description Figure 4.
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Pinouts and pin description STM32F103x4, STM32F103x6 6$$? 633? 0" 0" "//4 0" 0" 0" 0" 0" 0! 0! Figure 5. STM32F103xx performance line LQFP48 pinout ,1&0 6$$? 633? 0! 0! 0! 0! 0! 0! 0" 0" 0" 0" 0! 0! 0! 0! 0! 0" 0" 0" 0" 0" 633? 6$$? 6"!4 0# 4!-0%2 24 # 0# /3# ?). 0# /3# ?/54 0$ /3#?). 0$ /3#?/54 .
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STM32F103x4, STM32F103x6 Pinouts and pin description Figure 7. STM32F103xx performance line VFQFPN36 pinout 0" 0" 0! 0! 6$$? 6$$? /3#?). 0$ 633? /3#?/54 0$ 0! .234 0! 633! 0! 6$$! 0! 0! 7+50 0! 0! 0! 0! 0" 0" 0! 0" 0! 0" 0! 0! 0! "//4 633? 0" 0" 6$$? 633? 1&.
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Pinouts and pin description STM32F103x4, STM32F103x6 Table 5.
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STM32F103x4, STM32F103x6 Pinouts and pin description Table 5.
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Pinouts and pin description STM32F103x4, STM32F103x6 Alternate functions(4) VFQFPN36 Remap TFBGA64 Default LQFP64 Main function(3) (after reset) LQFP48/ UFQFPN48 Type(1) Pins I / O Level(2) Table 5.
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STM32F103x4, STM32F103x6 4 Memory mapping Memory mapping The memory map is shown in Figure 8. Figure 8.
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Electrical characteristics STM32F103x4, STM32F103x6 5 Electrical characteristics 5.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 5.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 9. Pin loading conditions Figure 10. Pin input voltage 34- & XX PIN 34- & XX PIN # P& 6). AI AI 5.1.6 Power supply scheme Figure 11. Power supply scheme 6"!4 "ACKUP CIRCUITRY /3# + 24# 7AKEUP LOGIC "ACKUP REGISTERS /54 '0 ) /S ).
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Electrical characteristics 5.1.7 STM32F103x4, STM32F103x6 Current consumption measurement Figure 12. Current consumption measurement scheme )$$?6"!4 6"!4 )$$ 6$$ 6$$! AI 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 6: Voltage characteristics, Table 7: Current characteristics, and Table 8: Thermal characteristics may cause permanent damage to the device.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 7. Current characteristics Symbol IVDD IVSS IIO Ratings Max.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 9. General operating conditions (continued) Symbol Parameter Conditions Min Max –0.3 VDD+ 0.3 2 V < VDD ≤ 3.6 V –0.3 5.5 VDD = 2 V –0.3 5.2 BOOT0 0 5.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 11. Embedded reset and power control block characteristics Symbol Parameter VPVD VPVDhyst(2) Conditions Min Typ PLS[2:0]=000 (rising edge) 2.1 2.18 2.26 V PLS[2:0]=000 (falling edge) 2 2.08 2.16 V PLS[2:0]=001 (rising edge) 2.19 2.28 2.37 V PLS[2:0]=001 (falling edge) 2.09 2.18 2.27 V PLS[2:0]=010 (rising edge) 2.28 2.38 2.48 V PLS[2:0]=010 (falling edge) 2.18 2.28 2.38 V PLS[2:0]=011 (rising edge) 2.38 2.
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Electrical characteristics 5.3.4 STM32F103x4, STM32F103x6 Embedded reference voltage The parameters given in Table 12 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 9. Table 12. Embedded internal reference voltage Symbol Conditions Min Typ –40 °C < TA < +105 °C 1.16 1.20 1.26 V –40 °C < TA < +85 °C 1.16 1.20 1.24 V ADC sampling time when TS_vrefint(1) reading the internal reference voltage - - 5.1 17.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 13.
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 13. Typical current consumption in Run mode versus frequency (at 3.6 V) code with data processing running from RAM, peripherals enabled Figure 14. Typical current consumption in Run mode versus frequency (at 3.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM Max(1) Symbol Parameter Conditions External clock(2), all peripherals enabled IDD Supply current in Sleep mode fHCLK Unit TA = 85 °C TA = 105 °C 72 MHz 26 27 48 MHz 17 18 36 MHz 14 15 24 MHz 10 11 16 MHz 7 8 8 MHz 4 5 72 MHz 7.5 8 48 MHz 6 6.5 36 MHz 5 5.5 24 MHz 4.5 5 16 MHz 4 4.
PAGE 40
Electrical characteristics STM32F103x4, STM32F103x6 Table 16. Typical and maximum current consumptions in Stop and Standby modes Typ(1) Symbol Parameter TA = VDD/VBA VDD/VBA VDD/VBA TA = 105 ° T = 2.0 V T = 2.4 V T = 3.3 V 85 °C C Conditions Supply current in Stop mode IDD Supply current in Standby mode Backup IDD_VBA domain supply T current Max Regulator in Run mode, low-speed and high-speed internal RC oscillators and high-speed oscillator OFF (no independent watchdog) - 21.3 21.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 16. Typical current consumption in Stop mode with regulator in Run mode versus temperature at VDD = 3.3 V and 3.6 V Figure 17. Typical current consumption in Stop mode with regulator in Low-power mode versus temperature at VDD = 3.3 V and 3.
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 18. Typical current consumption in Standby mode versus temperature at VDD = 3.3 V and 3.6 V Typical current consumption The MCU is placed under the following conditions: 42/99 • All I/O pins are in input mode with a static value at VDD or VSS (no load). • All peripherals are disabled except if it is explicitly mentioned.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 17. Typical current consumption in Run mode, code with data processing running from Flash Typ(1) Symbol Parameter Conditions External IDD clock(3) Supply current in Run mode Running on high speed internal RC (HSI), AHB prescaler used to reduce the frequency fHCLK All peripherals All peripherals enabled(2) disabled 72 MHz 31.3 24.5 48 MHz 21.9 17.4 36 MHz 17.2 13.8 24 MHz 11.2 8.9 16 MHz 8.1 6.6 8 MHz 5 4.2 4 MHz 3 2.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 18. Typical current consumption in Sleep mode, code running from Flash or RAM Typ(1) Symbol Parameter Conditions Supply current in Sleep mode All peripherals All peripherals enabled(2) disabled 72 MHz 12.6 5.3 48 MHz 8.7 3.8 36 MHz 6.7 3.1 24 MHz 4.8 2.3 16 MHz 3.4 1.8 8 MHz 2 1.2 4 MHz 1.5 1.1 2 MHz 1.25 1 1 MHz 1.1 0.98 500 kHz 1.05 0.96 125 kHz 1 0.95 64 MHz 10.6 4.2 48 MHz 8.1 3.2 36 MHz 6.1 2.
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STM32F103x4, STM32F103x6 Electrical characteristics On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in Table 19.
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Electrical characteristics 5.3.6 STM32F103x4, STM32F103x6 External clock source characteristics High-speed external user clock generated from an external source The characteristics given in Table 20 result from tests performed using an high-speed external clock source, and under ambient temperature and supply voltage conditions summarized in Table 9. Table 20.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 19. High-speed external clock source AC timing diagram VHSEH 90% VHSEL 10% tr(HSE) tf(HSE) tW(HSE) t tW(HSE) THSE EXTER NAL CLOCK SOURC E fHSE_ext OSC _IN IL STM32F103xx ai14143 Figure 20.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 22. HSE 4-16 MHz oscillator characteristics(1) (2) Symbol Conditions Min Typ Max Unit Oscillator frequency - 4 8 16 MHz RF Feedback resistor - - 200 - kΩ C Recommended load capacitance versus equivalent serial resistance of the crystal (RS)(3) RS = 30 Ω - 30 - pF i2 HSE driving current VDD = 3.
PAGE 49
STM32F103x4, STM32F103x6 Electrical characteristics time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Table 23. LSE oscillator characteristics (fLSE = 32.768 kHz)(1) (2) Symbol Parameter Conditions - Min Typ Max Unit - - - 5 - MΩ RF Feedback resistor C Recommended load capacitance versus equivalent serial resistance of the crystal (RS) RS = 30 KΩ - - - 15 pF I2 LSE driving current VDD = 3.
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 22. Typical application with a 32.768 kHz crystal Resonator with integrated capacitors CL1 fLSE OSC32_IN 32.768 kH z resonator Bias controlled gain RF STM32F103xx OSC32_OU T CL2 ai14146 5.3.7 Internal clock source characteristics The parameters given in Table 24 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 9. High-speed internal (HSI) RC oscillator Table 24.
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STM32F103x4, STM32F103x6 Electrical characteristics Low-speed internal (LSI) RC oscillator Table 25. LSI oscillator characteristics (1) Symbol fLSI(2) tsu(LSI) Parameter Frequency Min Typ Max Unit 30 40 60 kHz (3) LSI oscillator startup time - - 85 µs (3) LSI oscillator power consumption - 0.65 1.2 µA IDD(LSI) 1. VDD = 3 V, TA = –40 to 105 °C unless otherwise specified. 2. Based on characterization, not tested in production. 3. Guaranteed by design, not tested in production.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 26. Low-power mode wakeup timings Symbol Parameter tWUSLEEP(1) tWUSTOP(1) tWUSTDBY(1) Typ Unit Wakeup from Sleep mode 1.8 µs Wakeup from Stop mode (regulator in run mode) 3.6 Wakeup from Stop mode (regulator in low power mode) 5.4 Wakeup from Standby mode 50 µs µs 1. The wakeup times are measured from the wakeup event to the point in which the user application code reads the first instruction. 5.3.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 28. Flash memory characteristics (continued) Symbol IDD Vprog Min(1) Typ Max(1) Unit Read mode fHCLK = 72 MHz with 2 wait states, VDD = 3.3 V - - 20 mA Write / Erase modes fHCLK = 72 MHz, VDD = 3.3 V - - 5 mA Power-down mode / Halt, VDD = 3.0 to 3.6 V - - 50 µA 2 - 3.6 V Parameter Conditions Supply current Programming voltage - 1. Guaranteed by design, not tested in production. Table 29.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 30. EMS characteristics Symbol Parameter Level/ Class Conditions VFESD VDD = 3.3 V, TA = +25 °C, Voltage limits to be applied on any I/O pin to fHCLK = 72 MHz induce a functional disturbance conforms to IEC 61000-4-2 2B VEFTB Fast transient voltage burst limits to be applied through 100 pF on VDD and VSS pins to induce a functional disturbance VDD = 3.
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STM32F103x4, STM32F103x6 5.3.11 Electrical characteristics Absolute maximum ratings (electrical sensitivity) Based on three different tests (ESD, LU) using specific measurement methods, the device is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination.
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Electrical characteristics 5.3.12 STM32F103x4, STM32F103x6 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below VSS or above VDD (for standard, 3 V-capable I/O pins) should be avoided during normal product operation. However, in order to give an indication of the robustness of the microcontroller in cases when abnormal injection accidentally happens, susceptibility tests are performed on a sample basis during device characterization.
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STM32F103x4, STM32F103x6 5.3.13 Electrical characteristics I/O port characteristics General input/output characteristics Unless otherwise specified, the parameters given in Table 35 are derived from tests performed under the conditions summarized in Table 9. All I/Os are CMOS and TTL compliant. Table 35. I/O static characteristics Symbol Parameter Conditions Min Typ Max - - 0.28*(VDD-2 V)+0.8 V(1) - - 0.32*(VDD-2V)+0.75 V(1) All I/Os except BOOT0 - - 0.
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Electrical characteristics STM32F103x4, STM32F103x6 All I/Os are CMOS and TTL compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 23 and Figure 24 for standard I/Os, and in Figure 25 and Figure 26 for 5 V tolerant I/Os. Figure 23.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 25. 5 V tolerant I/O input characteristics - CMOS port !REA NOT DETERMINED 6)( 6), 6 6 $ 6 $ IREMENTS )( #-/3 IN 4ESTED ON 6 )( 6 $$ SIMULATIONS DESIGN ON D SE "A 6 ), 6 $$ NS GN SIMULATIO SI DE ON D "ASE 6 ENT 6 ), $$ DARD REQUIRM PRODUCTI REQU STANDARD #-/3 STAN TION ED IN PRODUC 4EST 6$$ 6 6$$ AI C Figure 26.
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Electrical characteristics STM32F103x4, STM32F103x6 Output driving current The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or source up to ±20 mA (with a relaxed VOL/VOH) except PC13, PC14 and PC15 which can sink or source up to +/-3mA. When using the GPIOs PC13 to PC15 in output mode, the speed should not exceed 2 MHz with a maximum load of 30 pF.
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STM32F103x4, STM32F103x6 Electrical characteristics Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 27 and Table 37, respectively. Unless otherwise specified, the parameters given in Table 37 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 9. Table 37.
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 27. I/O AC characteristics definition %84%2.!, /54054 /. P& TR )/ OUT TF )/ OUT 4 -AXIMUM FREQUENCY IS ACHIEVED IF T R TF 4 AND IF THE DUTY CYCLE IS WHEN LOADED BY P& 5.3.14 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 35).
PAGE 63
STM32F103x4, STM32F103x6 Electrical characteristics Figure 28. Recommended NRST pin protection VDD External reset circuit(1) RPU NRST(2) Internal Reset Filter 0.1 µF STM32F10xxx ai14132d 2. The reset network protects the device against parasitic resets. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 38. Otherwise the reset will not be taken into account by the device. 5.3.
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Electrical characteristics 5.3.16 STM32F103x4, STM32F103x6 Communications interfaces I2C interface characteristics The STM32F103xx performance line I2C interface meets the requirements of the standard I2C communication protocol with the following restrictions: the I/O pins SDA and SCL are mapped to are not “true” open-drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present. The I2C characteristics are described in Table 40.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 29. I2C bus AC waveforms and measurement circuit 6$$?) # 6$$?) # 5S 5S )£# BUS 34- & X 5V 3$! 5V 3#, 3TART REPEATED 3TART 3TART TSU 34! 3$! TF 3$! TR 3$! TH 34! TSU 3$! TW 3#,, TH 3$! TSU 34/ 34! 3TOP 3#, TW 3#,( TR 3#, TSU 34/ TF 3#, AI E 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. 2. Rs = Series protection resistors, Rp = Pull-up resistors, VDD_I2C = I2C bus supply. Table 41.
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Electrical characteristics STM32F103x4, STM32F103x6 SPI interface characteristics Unless otherwise specified, the parameters given in Table 42 are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 9. Refer to Section 5.3.12: I/O current injection characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 42.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 30. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW 6&. ,QSXW W68 166 &3+$ &32/ WK 166 WF 6&. WZ 6&.+ WZ 6&./ &3+$ &32/ W9 62 WD 62 0,62 287387 WU 6&. WI 6&. WK 62 06% 287 %,7 287 06% ,1 %,7 ,1 WGLV 62 /6% 287 WVX 6, 026, ,1387 /6% ,1 WK 6, DL F Figure 31. SPI timing diagram - slave mode and CPHA = 1(1) 166 LQSXW 6&. LQSXW W68 166 &3+$ &32/ &3+$ &32/ WZ 6&.+ WZ 6&.
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 32. SPI timing diagram - master mode(1) (IGH .33 INPUT 3#+ OUTPUT #0(! #0/, 3#+ OUTPUT TC 3#+ #0(! #0/, #0(! #0/, #0(! #0/, TSU -) -)3/ ).0 54 TW 3#+( TW 3#+, TR 3#+ TF 3#+ -3 "). ") 4 ). ,3" ). TH -) -/3) /5454 " ) 4 /54 - 3" /54 TV -/ ,3" /54 TH -/ AI 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. USB characteristics The USB interface is USB-IF certified (Full Speed). Table 43.
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STM32F103x4, STM32F103x6 Electrical characteristics Table 44. USB DC electrical characteristics Symbol Parameter Conditions Min.(1) Max.(1) Unit - 3.0(3) 3.6 V Input levels VDD USB operating voltage(2) VDI(4) Differential input sensitivity I(USBDP, USBDM) 0.2 - VCM(4) Differential common mode range Includes VDI range 0.8 2.5 VSE(4) Single ended receiver threshold - 1.3 2.0 V Output levels VOL Static output level low RL of 1.5 kΩ to 3.6 V(5) - 0.
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Electrical characteristics 5.3.18 STM32F103x4, STM32F103x6 12-bit ADC characteristics Unless otherwise specified, the parameters given in Table 46 are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table 9. Note: It is recommended to perform a calibration after each power-up. Table 46. ADC characteristics Symbol Conditions Min Typ Max Unit Power supply - 2.4 - 3.6 V Positive reference voltage - 2.
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STM32F103x4, STM32F103x6 Electrical characteristics Equation 1: RAIN max formula: TS - – R ADC R AIN < --------------------------------------------------------------N+2 f ADC × C ADC × ln ( 2 ) The formula above (Equation 1) is used to determine the maximum external impedance allowed for an error below 1/4 of LSB. Here N = 12 (from 12-bit resolution). Table 47. RAIN max for fADC = 14 MHz(1) Ts (cycles) tS (µs) RAIN max (kΩ) 1.5 0.11 0.4 7.5 0.54 5.9 13.5 0.96 11.4 28.5 2.04 25.2 41.5 2.
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Electrical characteristics STM32F103x4, STM32F103x6 Table 49. ADC accuracy(1) (2) (3) Symbol Parameter ET Test conditions Total unadjusted error EO Offset error EG Gain error ED Differential linearity error EL Integral linearity error fPCLK2 = 56 MHz, fADC = 14 MHz, RAIN < 10 kΩ, VDDA = 2.4 V to 3.6 V Measurements made after ADC calibration Typ Max(4) ±2 ±5 ±1.5 ±2.5 ±1.5 ±3 ±1 ±2 ±1.5 ±3 Unit LSB 1. ADC DC accuracy values are measured after internal calibration. 2.
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STM32F103x4, STM32F103x6 Electrical characteristics Figure 35. Typical connection diagram using the ADC VDD RAIN(1) VAIN VT 0.6 V AINx Cparasitic VT 0.6 V IL±1 µA STM32F103xx Sample and hold ADC converter RADC(1) 12-bit converter CADC(1) ai14150c 1. Refer to Table 46 for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF).
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Electrical characteristics STM32F103x4, STM32F103x6 Figure 37. Power supply and reference decoupling(VREF+ connected to VDDA) 34- & X 6$$! 62%& SEE NOTE & N& 633! AI 1. The VREF+ input is available only on the TFBGA64 package. 5.3.19 Temperature sensor characteristics Table 50. TS characteristics Symbol Parameter TL(1) Avg_Slope V25 Min Typ Max Unit - ±1 ±2 °C Average slope 4.0 4.3 4.6 mV/°C Voltage at 25 °C 1.34 1.43 1.
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STM32F103x4, STM32F103x6 6 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 6.1 VFQFPN36 Package Figure 38. VFQFPN36 - 36-pin, 6x6 mm, 0.
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Package information STM32F103x4, STM32F103x6 Table 51. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.800 0.900 1.000 0.0315 0.0354 0.0394 A1 - 0.020 0.050 - 0.0008 0.0020 A2 - 0.650 1.000 - 0.0256 0.0394 A3 - 0.200 - - 0.0079 - b 0.180 0.230 0.300 0.0071 0.0091 0.0118 D 5.875 6.000 6.125 0.2313 0.2362 0.2411 D2 1.750 3.700 4.250 0.0689 0.
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STM32F103x4, STM32F103x6 Package information Figure 39. VFQFPN36 - 36-pin, 6x6 mm, 0.5 mm pitch very thin profile fine pitch quad flat package recommended footprint :2?&0?6 1. Dimensions are expressed in millimeters.
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Package information STM32F103x4, STM32F103x6 Device Marking for VFQFPN36 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 40. VFQFPN36 marking example (package view) 3URGXFW LGHQWLILFDWLRQ 670 ) 7 8 $ 'DWH FRGH \HDU ZHHN < :: 3LQ LGHQWLILFDWLRQ 5HYLVLRQ FRGH $ 06Y 9 1.
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STM32F103x4, STM32F103x6 6.2 Package information UFQFPN48 package information Figure 41. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package outline 3LQ LGHQWLILHU ODVHU PDUNLQJ DUHD ' $ ( ( 7 GGG $ 6HDWLQJ SODQH E H 'HWDLO < ' ([SRVHG SDG DUHD < ' / & [ SLQ FRUQHU ( 5 W\S 'HWDLO = = $ % B0(B9 1. Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve the lead/pad solder joint life. 3.
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Package information STM32F103x4, STM32F103x6 Table 52. UFQFPN48 - 48-lead, 7x7 mm, 0.5 mm pitch, ultra thin fine pitch quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 D 6.900 7.000 7.100 0.2717 0.2756 0.2795 E 6.900 7.000 7.100 0.2717 0.2756 0.2795 D2 5.500 5.600 5.700 0.2165 0.2205 0.2244 E2 5.500 5.600 5.700 0.2165 0.2205 0.2244 L 0.
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STM32F103x4, STM32F103x6 Package information Device Marking for UFQFPN48 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 43. UFQFPN48 marking example (package view 3URGXFW LGHQWLILFDWLRQ 670 ) & 8 $ 'DWH FRGH \HDU ZHHN < :: 3LQ LGHQWLILFDWLRQ 5HYLVLRQ FRGH $ 06Y 9 1.
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Package information 6.3 STM32F103x4, STM32F103x6 LQFP64 package information Figure 44. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package outline PP *$8*( 3/$1( F $ $ $ 6($7,1* 3/$1( & $ FFF & ' ' ' . / / 3,1 ,'(17,),&$7,21 ( ( ( E H :B0(B9 1. Drawing is not to scale. Table 53. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol 82/99 Min Typ Max Min Typ Max A - - 1.
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STM32F103x4, STM32F103x6 Package information Table 53. LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max E3 - 7.500 - - 0.2953 - e - 0.500 - - 0.0197 - K 0° 3.5° 7° 0° 3.5° 7° L 0.450 0.600 0.750 0.0177 0.0236 0.0295 L1 - 1.000 - - 0.0394 - ccc - - 0.080 - - 0.0031 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 45.
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Package information STM32F103x4, STM32F103x6 Device Marking for LQFP64 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 46. LQFP64 marking example (package view 3URGXFW LGHQWLILFDWLRQ 670 ) 5 7 $ < :: 'DWH FRGH \HDU ZHHN 3LQ LGHQWLILFDWLRQ $ 5HYLVLRQ FRGH 06Y 9 1.
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STM32F103x4, STM32F103x6 6.4 Package information TFBGA64 package information Figure 47. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch thin profile fine pitch ball grid array package outline ( $ ( ) H + ) ' ' E EDOOV HHH 0 & % $ III 0 & $ % H $ EDOO LQGH[ DUHD 723 9,(: $ EDOO LGHQWLILHU %27720 9,(: & 6HDWLQJ SODQH GGG & $ $ $ $ 6,'( 9,(: 5 B0(B9 1. Drawing is not to scale. Table 54. TFBGA64 – 64-ball, 5 x 5 mm, 0.
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Package information STM32F103x4, STM32F103x6 Table 54. TFBGA64 – 64-ball, 5 x 5 mm, 0.5 mm pitch, thin profile fine pitch ball grid array package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max e - 0.500 - - 0.0197 - F - 0.750 - - 0.0295 - ddd - - 0.080 - - 0.0031 eee - - 0.150 - - 0.0059 fff - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 48. TFBGA64 – 64-ball, 5 x 5 mm, 0.
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STM32F103x4, STM32F103x6 Package information Device Marking for TFBGA64 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 49. TFBGA64 marking example (package view 3URGXFW LGHQWLILFDWLRQ ) 'DWH FRGH \HDU ZHHN < :: %DOO LGHQWLILFDWLRQ 5HYLVLRQ FRGH $ 06Y 9 1.
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Package information 6.5 STM32F103x4, STM32F103x6 LQFP48 package information Figure 50. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline C ! ! ! 3%!4).' 0,!.% # MM '!5'% 0,!.% CCC # + ! $ $ , , $ 0). )$%.4)&)#!4)/. % E 1. Drawing is not to scale.
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STM32F103x4, STM32F103x6 Package information Table 56. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.
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Package information STM32F103x4, STM32F103x6 Figure 51. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package recommended footprint AI D 1. Dimensions are expressed in millimeters.
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STM32F103x4, STM32F103x6 Package information Device Marking for LQFP48 The following figure gives an example of topside marking orientation versus ball 1 identifier location. Figure 52. LQFP48 marking example (package view 3URGXFW LGHQWLILFDWLRQ 670 ) & 7 $ 'DWH FRGH \HDU ZHHN < :: 3LQ LGHQWLILFDWLRQ 5HYLVLRQ FRGH $ 06Y 9 1.
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Package information 6.6 STM32F103x4, STM32F103x6 Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 9: General operating conditions on page 33.
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STM32F103x4, STM32F103x6 6.6.2 Package information Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Table 58: Ordering information scheme. Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum dissipation and, to a specific maximum junction temperature.
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Package information STM32F103x4, STM32F103x6 Using the values obtained in Table 57 TJmax is calculated as follows: – For LQFP64, 45 °C/W TJmax = 115 °C + (45 °C/W × 134 mW) = 115 °C + 6.03 °C = 121.03 °C This is within the range of the suffix 7 version parts (–40 < TJ < 125 °C). In this case, parts must be ordered at least with the temperature range suffix 7 (see Table 58: Ordering information scheme). Figure 53. LQFP64 PD max vs.
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STM32F103x4, STM32F103x6 7 Ordering information scheme Ordering information scheme Table 58.
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Revision history 8 STM32F103x4, STM32F103x6 Revision history Table 59. Document revision history Date Revision 22-Sep-2008 1 Initial release. 2 “96-bit unique ID” feature added and I/O information clarified on page 1. Timers specified on page 1 (Motor control capability mentioned). Table 4: Timer feature comparison added. PB4, PB13, PB14, PB15, PB3/TRACESWO moved from Default column to Remap column, plus small additional changes in Table 5: Low-density STM32F103xx pin definitions.
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STM32F103x4, STM32F103x6 Revision history Table 59. Document revision history (continued) Date 20-May-2010 19-Apr-2011 Revision Changes 4 Added VFQFPN48 package. Updated note 2 below Table 40: I2C characteristics Updated Figure 29: I2C bus AC waveforms and measurement circuit Updated Figure 28: Recommended NRST pin protection Updated Section 5.3.
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Revision history STM32F103x4, STM32F103x6 Table 59.
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STM32F103x4, STM32F103x6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.