Datasheet

DocID028798 Rev 3 141/155
STM32L432KB STM32L432KC Electrical characteristics
147
Quad SPI characteristics
Unless otherwise specified, the parameters given in Table 78 and Table 79 for Quad SPI
are derived from tests performed under the ambient temperature, f
AHB
frequency and V
DD
supply voltage conditions summarized in Table 21: General operating conditions, with the
following configuration:
• Output speed is set to OSPEEDRy[1:0] = 11
• Capacitive load C = 15 or 20 pF
• Measurement points are done at CMOS levels: 0.5  V
DD
Refer to Section 6.3.14: I/O port characteristics for more details on the input/output alternate
function characteristics.
Table 78. Quad SPI characteristics in SDR mode
(1)
Symbol Parameter Conditions Min Typ Max Unit
F
CK
1/t
(CK)
Quad SPI clock frequency
1.71 < V
DD
< 3.6 V, C
LOAD
= 20 pF
Voltage Range 1
--40
MHz
1.71 < V
DD
< 3.6 V, C
LOAD
= 15 pF
Voltage Range 1
--48
2.7 < V
DD
< 3.6 V, C
LOAD
= 15 pF
Voltage Range 1
--60
1.71 < V
DD
< 3.6 V C
LOAD
= 20 pF
Voltage Range 2
--26
t
w(CKH)
Quad SPI clock high and
low time
f
AHBCLK
= 48 MHz, presc=0
t
(CK)
/2-2 - t
(CK)
/2
ns
t
w(CKL)
t
(CK)
/2 - t
(CK)
/2+2
t
s(IN)
Data input setup time
Voltage Range 1 2 - -
Voltage Range 2 3.5 - -
t
h(IN)
Data input hold time
Voltage Range 1 5 - -
Voltage Range 2 6.5 - -
t
v(OUT)
Data output valid time
Voltage Range 1 - 1 5
Voltage Range 2 - 3 5
t
h(OUT)
Data output hold time
Voltage Range 1 0 - -
Voltage Range 2 0 - -
1. Guaranteed by characterization results.
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