Datasheet

Functional overview STM32L432KB STM32L432KC
20/155 DocID028798 Rev 3
Table 3. STM32L432xx modes overview
Mode Regulator
(1)
CPU Flash SRAM Clocks DMA & Peripherals
(2)
Wakeup source Consumption
(3)
Wakeup time
Run
MR range 1
Yes ON
(4)
ON Any
All
N/A
97 µA/MHz
N/A
MR range2 All except USB_FS, RNG 84 µA/MHz
LPRun LPR Yes ON
(4)
ON
Any
except
PLL
All except USB_FS, RNG N/A 94 µA/MHz
to Range 1: 4 µs
to Range 2: 64 µs
Sleep
MR range 1
No ON
(4)
ON
(5)
Any
All
Any interrupt or
event
28 µA/MHz
6 cycles
MR range2 All except USB_FS, RNG 26 µA/MHz
LPSleep LPR No ON
(4)
ON
(5)
Any
except
PLL
All except USB_FS, RNG
Any interrupt or
event
29 µA/MHz 6 cycles
Stop 0
MR Range 1
No OFF ON
LSE
LSI
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1,2)
DACx (x=1,2)
OPAMPx (x=1)
USARTx (x=1,2)
(6)
LPUART1
(6)
I2Cx (x=1,3)
(7)
LPTIMx (x=1,2)
***
All other peripherals are
frozen.
Reset pin, all I/Os
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1..2)
USARTx (x=1,2)
(6)
LPUART1
(6)
I2Cx (x=1,3)
(7)
LPTIMx (x=1,2)
USB_FS
(8)
SWPMI1
(9)
TBD
2.4 µs in SRAM
4.1 µs in Flash
MR Range 2 108 µA
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