Datasheet

STM32L432KB STM32L432KC Functional overview
DocID028798 Rev 3 21/155
Stop 1 LPR No Off ON
LSE
LSI
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1,2)
DACx (x=1,2)
OPAMPx (x=1)
USARTx (x=1,2)
(6)
LPUART1
(6)
I2Cx (x=1,3)
(7)
LPTIMx (x=1,2)
***
All other peripherals are
frozen.
Reset pin, all I/Os
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1..2)
USARTx (x=1,2)
(6)
LPUART1
(6)
I2Cx (x=1,3)
(7)
LPTIMx (x=1,2)
USB_FS
(8)
SWPMI1
(9)
4.34 µA w/o RTC
4.63 µA w RTC
6.3 µs in SRAM
7.8 µs in Flash
Stop 2 LPR No Off ON
LSE
LSI
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1..2)
I2C3
(7)
LPUART1
(6)
LPTIM1
***
All other peripherals are
frozen.
Reset pin, all I/Os
BOR, PVD, PVM
RTC, IWDG
COMPx (x=1..2)
I2C3
(7)
LPUART1
(6)
LPTIM1
1.3 µA w/o RTC
1.4 µA w/RTC
6.8 µs in SRAM
8.2 µs in Flash
Table 3. STM32L432xx modes overview (continued)
Mode Regulator
(1)
CPU Flash SRAM Clocks DMA & Peripherals
(2)
Wakeup source Consumption
(3)
Wakeup time
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