Datasheet

DocID028798 Rev 3 47/155
STM32L432KB STM32L432KC Functional overview
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The CAN peripheral supports:
• Supports CAN protocol version 2.0 A, B Active
• Bit rates up to 1 Mbit/s
• Transmission
– Three transmit mailboxes
– Configurable transmit priority
• Reception
– Two receive FIFOs with three stages
– 14 Scalable filter banks
– Identifier list feature
– Configurable FIFO overrun
• Time-triggered communication option
– Disable automatic retransmission mode
– 16-bit free running timer
– Time Stamp sent in last two data bytes
• Management
– Maskable interrupts
– Software-efficient mailbox mapping at a unique address space
3.30 Universal serial bus (USB)
The STM32L432xx devices embed a full-speed USB device peripheral compliant with the
USB specification version 2.0. The internal USB PHY supports USB FS signaling,
embedded DP pull-up and also battery charging detection according to Battery Charging
Specification Revision 1.2. The USB interface implements a full-speed (12
Mbit/s) function
interface with added support for USB 2.0 Link Power Management. It has software-
configurable endpoint setting with packet memory up-to 1
KB and suspend/resume support.
It requires a precise 48
MHz clock which can be generated from the internal main PLL or by
the internal 48
MHz oscillator in automatic trimming mode. The synchronization for this
oscillator can be taken from the USB data stream itself (SOF signalization) which allows
crystal less operation.
3.31 Clock recovery system (CRS)
The STM32L432xx devices embed a special block which allows automatic trimming of the
internal 48
MHz oscillator to guarantee its optimal accuracy over the whole device
operational range. This automatic trimming is based on the external synchronization signal,
which could be either derived from USB SOF signalization, from LSE oscillator, from an
external signal on CRS_SYNC pin or generated by user software. For faster lock-in during
startup it is also possible to combine automatic trimming with manual trimming action.
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