Datasheet

Memory and register map STM8L051F3
28/96 DS9178 Rev 4
Table 7. General hardware register map
Address Block Register label Register name
Reset
status
0x00 502E
to
0x00 5049
Reserved area (44 bytes)
0x00 5050
Flash
FLASH_CR1 Flash control register 1 0x00
0x00 5051 FLASH_CR2 Flash control register 2 0x00
0x00 5052 FLASH _PUKR Flash program memory unprotection key register 0x00
0x00 5053 FLASH _DUKR Data EEPROM unprotection key register 0x00
0x00 5054 FLASH _IAPSR Flash in-application programming status register 0x00
0x00 5055
to
0x00 506F
Reserved area (27 bytes)
0x00 5070
DMA1
DMA1_GCSR DMA1 global configuration & status register 0xFC
0x00 5071 DMA1_GIR1 DMA1 global interrupt register 1 0x00
0x00 5072 to
0x00 5074
Reserved area (3
bytes)
0x00 5075 DMA1_C0CR DMA1 channel 0 configuration register 0x00
0x00 5076 DMA1_C0SPR DMA1 channel 0 status & priority register 0x00
0x00 5077 DMA1_C0NDTR
DMA1 number of data to transfer register
(channel 0)
0x00
0x00 5078 DMA1_C0PARH
DMA1 peripheral address high register
(channel 0)
0x52
0x00 5079 DMA1_C0PARL
DMA1 peripheral address low register
(channel 0)
0x00
0x00 507A Reserved area (1 byte)
0x00 507B DMA1_C0M0ARH
DMA1 memory 0 address high register
(channel 0)
0x00
0x00 507C DMA1_C0M0ARL
DMA1 memory 0 address low register
(channel 0)
0x00
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