Datasheet

Memory and register map STM8L051F3
30/96 DS9178 Rev 4
0x00 5098
DMA1
DMA_C3M0EAR
DMA channel 3 memory 0 extended address
register
0x00
0x00 5099 DMA1_C3M0ARH
DMA1 memory 0 address high register
(channel 3)
0x00
0x00 509A DMA1_C3M0ARL
DMA1 memory 0 address low register
(channel 3)
0x00
0x00 509B to
0x00 509C
Reserved area (3 bytes)
0x00 509D
SYSCFG
SYSCFG_RMPCR3 Remapping register 3 0x00
0x00 509E SYSCFG_RMPCR1 Remapping register 1 0x00
0x00 509F SYSCFG_RMPCR2 Remapping register 2 0x00
0x00 50A0
ITC - EXTI
EXTI_CR1 External interrupt control register 1 0x00
0x00 50A1 EXTI_CR2 External interrupt control register 2 0x00
0x00 50A2 EXTI_CR3 External interrupt control register 3 0x00
0x00 50A3 EXTI_SR1 External interrupt status register 1 0x00
0x00 50A4 EXTI_SR2 External interrupt status register 2 0x00
0x00 50A5 EXTI_CONF1 External interrupt port select register 1 0x00
0x00 50A6
WFE
WFE_CR1 WFE control register 1 0x00
0x00 50A7 WFE_CR2 WFE control register 2 0x00
0x00 50A8 WFE_CR3 WFE control register 3 0x00
0x00 50A9 WFE_CR4 WFE control register 4 0x00
0x00 50AA
ITC - EXTI
EXTI_CR4 External interrupt control register 4 0x00
0x00 50AB EXTI_CONF2 External interrupt port select register 2 0x00
0x00 50A9
to
0x00 50AF
Reserved area (7 bytes)
0x00 50B0
RST
RST_CR Reset control register 0x00
0x00 50B1 RST_SR Reset status register 0x01
0x00 50B2
PWR
PWR_CSR1 Power control and status register 1 0x00
0x00 50B3 PWR_CSR2 Power control and status register 2 0x00
0x00 50B4
to
0x00 50BF
Reserved area (12 bytes)
0x00 50C0
CLK
CLK_CKDIVR CLK Clock master divider register 0x03
0x00 50C1 CLK_CRTCR CLK Clock RTC register 0x00
(1)
0x00 50C2 CLK_ICKCR CLK Internal clock control register 0x11
0x00 50C3 CLK_PCKENR1 CLK Peripheral clock gating register 1 0x00
Table 7. General hardware register map (continued)
Address Block Register label Register name
Reset
status
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