Datasheet

DS9178 Rev 4 39/96
STM8L051F3 Memory and register map
41
0x00 7F97
DM
DM_CR2 DM Debug module control register 2 0x00
0x00 7F98 DM_CSR1 DM Debug module control/status register 1 0x10
0x00 7F99 DM_CSR2 DM Debug module control/status register 2 0x00
0x00 7F9A DM_ENFCTR DM enable function register 0xFF
0x00 7F9B
to
0x00 7F9F
Reserved area (5 bytes)
1. Accessible by debug module only
Table 8. CPU/SWIM/debug module/interrupt controller registers (continued)
Address Block Register label Register name
Reset
status
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