Datasheet
Table Of Contents
- 1 Schematic diagram
- 2 Absolute maximum ratings and operating conditions
- 3 Electrical characteristics
- Table 3. Electrical characteristics at VCC = ±15V, Tamb = +25˚C (unless otherwise specified)
- Figure 2. Maximum peak-to-peak output voltage versus frequency
- Figure 3. Maximum peak-to-peak output voltage versus frequency
- Figure 4. Maximum peak-to-peak output voltage versus frequency
- Figure 5. Maximum peak-to-peak output voltage versus free air temperature
- Figure 6. Maximum peak-to-peak output voltage versus load resistance
- Figure 7. Maximum peak-to-peak output voltage versus supply voltage
- Figure 8. Input bias current versus free air temperature
- Figure 9. Large signal differential voltage amplification versus free air temp
- Figure 10. Large signal differential voltage amplification and phase shift versus frequency
- Figure 11. Total power dissipation versus free air temperature
- Figure 12. Supply current per amplifier versus free air temperature
- Figure 13. Common mode rejection ratio versus free air temperature
- Figure 14. Voltage follower large signal pulse response
- Figure 15. Output voltage versus elapsed time
- Figure 16. Equivalent input noise voltage versus frequency
- Figure 17. Total harmonic distortion versus frequency
- 4 Parameter measurement information
- 5 Typical application
- 6 Package information
- 7 Ordering information
- 8 Revision history

July 2008 Rev 6 1/16
16
TL072 TL072A TL072B
Low noise JFET dual operational amplifiers
Features
■ Wide common-mode (up to V
CC
+
) and
differential voltage range
■ Low input bias and offset current
■ Low noise e
n
= 15 nV/√Hz (typ)
■ Output short-circuit protection
■ High input impedance JFET input stage
■ Low harmonic distortion: 0.01% (typical)
■ Internal frequency compensation
■ Latch-up free operation
■ High slew rate: 16 V/µs (typ)
Description
The TL072, TL072A and TL072B are high speed
JFET input dual operational amplifiers
incorporating well matched, high voltage JFET
and bipolar transistors in a monolithic integrated
circuit.
The devices feature high slew rates, low input
bias and offset current, and low offset voltage
temperature coefficient.
N
DIP8
(Plastic package)
D
SO-8
(Plastic micropackage)
1
2
3
45
6
7
8
-
+
-
+
Pin connections (top view)
1 - Output 1
2 - Inverting input 1
3 - Non-inverting input 1
4 - V
CC
-
5 - Non-inverting input 2
6 -Inverting input 2
7 - Output 2
8 - V
CC
+
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