Datasheet

13/31
STE100P
3 ANAR Interrupt source of Auto-Negotiation Acknowledge Received.
0: there is no link code word received.
1: link code word is receive from link partner.
0RO/LH*
2 PDF Interrupt source of Parallel Detection Fault.
0: there is no parallel detection fault.
1: parallel detection is fault.
0RO/LH*
1 ANPR Interrupt source of Auto-Negotiation Page Received.
0: there is no Auto-Negotiation page received.
1: auto-negotiation page is received.
0RO/LH*
0 REF Interrupt source of Receive Error full.
0: the receive error number is less than 64.
1: 64 error packets are received.
0RO/LH*
LH = High Latching and cleared by reading.
PR18- XIE, XCVR Interrupt Enable Register
15~7 --- Reserved
6 ANCE Auto-Negotiation Completed interrupt Enable.
0: disable Auto-Negotiation completed interrupt.
1: enable Auto-Negotiation complete interrupt.
0R/W
5 RFE Remote Fault detected interrupt Enable.
0: disable remote fault detection interrupt.
1: enable remote fault detection interrupt.
0R/W
4 LDE Link Down interrupt Enable.
0: disable link fail interrupt.
1: enable link fail interrupt.
0R/W
3 ANAE Auto-Negotiation Acknowledge interrupt Enable.
0: disable link partner acknowledge interrupt
1: enable link partner acknowledge interrupt.
0R/W
2 PDFE Parallel Detection Fault interrupt Enable.
0: disable fault parallel detection interrupt.
1: enable fault parallel detection interrupt.
0R/W
1 ANPE Auto-Negotiation Page Received interrupt Enable.
0: disable Auto-Negotiation page received interrupt.
1: enable Auto-Negotiation page received interrupt.
0R/W
0 REFE RX_ERR full interrupt Enable.
0: disable rx_err full interrupt.
1: enable more than 64 time rx_err interrupt,
0R/W
PR19- 100CTR, 100Base-TX Control Register
15,14 --- reserved
13 DISRER Disable the RX_ERR counter.
0: the receive error counter - RX_ERR is enabled.
1: the receive error counter - RX_ERR is disabled.
0R/W
12 ANC Auto-Negotiation completed. This bit is the same as PR1:5.
0: the Auto-Negotiation process has not completed yet.
1: the Auto-Negotiation process has completed.
0RO
Table 5. Register Descriptions (continued)
Bit # Name Descriptions Default Val RW Type