Datasheet

STE100P
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Figure 16. 10Base-T Half Duplex Transmit Timing
Table 10.
Parameter Sym Min Typ Max Units
TXD, TX_EN, TX_ER Setup to TX_CLK High t8A 10 - - ns
TXD, TX_EN, TX_ER Hold from TX_CLK High t8B 5 - - ns
TX_EN sampled to CRS asserted t8C - 0 4 us
TX_EN sampled to CRS de-asserted t8E - 1 us
TX_EN sampled to TXP out (Tx latency) t8D - 400 ns
TXP