L6562AT Transition-mode PFC controller Features ■ Guaranteed for extreme temperature range (outdoor) ■ Proprietary multiplier design for minimum THD ■ Very accurate adjustable output overvoltage protection DIP-8 ■ SO-8 DIP-8/SO-8 packages ■ Ultra-low (30 μA) start-up current ■ Low (2.
Contents L6562AT Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . .
Description 1 L6562AT Description The L6562AT is a current-mode PFC controller operating in transition mode (TM). Coming with the same pin-out as its predecessors L6561 and L6562, it offers improved performance. The highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with an extremely low THD, even over a large load range.
Pin settings L6562AT 2 Pin settings 2.1 Pin connection Figure 2. 2.2 INV 1 8 Vcc COMP 2 7 GD MULT 3 6 GND CS 4 5 ZCD Pin description Table 2. 4/25 Pin connection (top view) Pin description Pin N° Name Description 1 INV Inverting input of the error amplifier. The information on the output voltage of the PFC pre-regulator is fed into this pin through a resistor divider. The pin doubles as an ON/OFF control input. 2 COMP Output of the error amplifier.
Maximum ratings 3 Maximum ratings Table 3. 4 L6562AT Absolute maximum ratings Symbol Pin VCC 8 IGD 7 --- 1 to 4 IZCD 5 Parameter Value Unit IC supply voltage (ICC ≤ 20 mA) Self-limited V Output totem pole peak current Self-limited A -0.3 to 8 V ±10 mA Analog inputs and outputs Zero current detector max. current Thermal data Table 4. Thermal data Value Symbol Unit SO8 DIP8 RthJA Max.
Electrical characteristics 5 L6562AT Electrical characteristics -40 °C < TJ < +125 °C, VCC = 12 V, CO = 1 nF; unless otherwise specified Table 5. Electrical characteristics Symbol Parameter Test condition Min Typ Max Unit 22.5 V Supply voltage VCC VccOn VccOff Operating range After turn-on 10.5 Turn-on threshold (1) 11.7 12.5 13.3 V Turn-off threshold (1) 9.5 10 10.5 V 2.8 V 25 28 V Hys Hysteresis VZ Zener voltage 2.2 ICC = 20 mA 22.
Electrical characteristics Table 5. Symbol L6562AT Electrical characteristics (continued) Parameter Test condition Min Typ Max Unit 19.5 27 30.5 µA Output overvoltage IOVP Dynamic OVP triggering current Hys Hysteresis (3) Static OVP threshold (1) 20 2.1 2.25 µA 2.
Typical electrical characteristic 6 L6562AT Typical electrical characteristic Figure 3. Supply current vs supply voltage Figure 4. Start-up and UVLO vs TJ p 10.00 j 13 Vcc-ON 12 0.10 (V) Icc (mA) 1.00 11 10 0.01 Co = 1 nF f = 70 kHz Tj = 25°C 0.00 0.00 Vcc-OFF 9 5.00 10.00 15.00 20.00 -50 25.00 0 Vcc (V) Figure 5. IC consumption vs TJ p 50 100 150 Tj (°C) Figure 6.
Typical electrical characteristic Figure 7. L6562AT Feedback reference vs TJ Figure 8. OVP current vs TJ j 35 2.6 34 Vcc = 12V Vcc = 12V 33 32 2.55 Iovp (uA) VREF (V) 31 2.5 30 29 28 27 26 2.45 25 24 2.4 23 -50 0 50 100 150 -50 0 Tj (°C) Figure 9. 50 Tj (°C) 100 150 E/A output clamp levels vs TJ Figure 10.
Typical electrical characteristic L6562AT Figure 11. Multiplier characteristic Figure 12. Vcs clamp vs TJ p 1.3 1.2 V COMP (pin2) (V) Upper Volt. Clamp 1.1 Vcc = 12V 5.75 V 1.0 VCOMP = Upper clamp 4V 0.9 3.5V 5V 1.2 4.5V 0.7 Vcsx (V) Vcs (pin4) (V) 0.8 0.6 0.5 3V 0.4 1.1 0.3 0.2 0.1 2.5 V 0.0 1 -0.1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VMULT (pin3) (V) 2.2 2.4 2.6 2.8 0 50 100 150 Tj (°C) Figure 13. ZCD clamp levels vs TJ p -50 3 Figure 14.
Typical electrical characteristic L6562AT Figure 15. Gate-driver output low saturation Figure 16. Gate-drive output high saturation 5.00 12.00 Tj = 25 °C 11.00 4.00 Vcc = 12V SOURCE 10.00 Vpin7 (V) Vpin7 (V) 3.00 2.00 9.00 8.00 Tj = 25 °C 1.00 7.00 Vcc = 12V SINK 0.00 6.00 0 200 400 600 800 1000 0 200 400 600 I GD (mA) I GD (m A) Figure 17. Gate-drive clamp vs TJ Figure 18. Output gate drive low saturation vs TJ during UVLO 13.5 1.1 Vcc = 20V Isink = 2 mA 1 Vcc = 11V 0.
Application information L6562AT 7 Application information 7.1 Overvoltage protection Under steady-state conditions, the voltage control loop keeps the output voltage Vo of a PFC pre-regulator close to its nominal value, set by the resistors R1 and R2 of the output divider. Neglecting ripple components, the current through R1, IR1, equals that through R2, IR2. Considering that the non-inverting input of the error amplifier is internally referenced at 2.5 V, also the voltage at pin INV will be 2.
Application information L6562AT When the load of a PFC pre-regulator is very low, the output voltage tends to stay steadily above the nominal value, which cannot be handled by the Dynamic OVP. If this occurs, however, the error amplifier output will saturate low; hence, when this is detected the external power transistor is switched off and the IC put in an idle state (static OVP). Normal operation is resumed as the error amplifier goes back into its linear region.
Application information L6562AT Figure 19. THD optimization: standard TM PFC controller (left side) and L6562AT (right side) Input current Input current Rectified mains voltage Imains Input current Rectified mains voltage Imains Input current MOSFET's drainVdrain voltage MOSFET's drainVdrain voltage To overcome this issue the circuit embedded in the device forces the PFC pre-regulator to process more energy near the line voltage zero-crossings as compared to that commanded by the control loop.
Application information 7.4 L6562AT Operating with no auxiliary winding on the boost inductor To generate the synchronization signal on the ZCD pin, the typical approach requires the connection between the pin and an auxiliary winding of the boost inductor through a limiting resistor. When the device is supplied by the cascaded DC-DC converter, it is necessary to introduce a supplementary winding to the PFC choke just to operate the ZCD pin.
Application information 7.5 L6562AT Comparison between the L6562AT and the L6562 The L6562AT is not a direct drop-in replacement of the L6562, even if both have the same pin-out. One function (Disable) has been relocated. Table 2 compares the two devices, i.e. those parameters that may result in different values of the external components. The parameters that have the most significant impact on the design, i.e.
Application examples and ideas 8 L6562AT Application examples and ideas Figure 21. Demonstration board wide-range mains: electrical schematic Vo=400V Po=80W D1 NTC STTH1L06 2.5 Ω R4 R5 270 kΩ 270 kΩ Vac 88V to 264V + P1 W08 C1 0.22 µF 630V T1 R14 100 Ω R11 1M Ω R50 - 22 kΩ R6 47 kΩ R2 1 MΩ VCC 8 MULT 3 COMP 5 C23 150 nF 2 L6562A L6562A GND C29 22 µF 25V Boost Inductor Spec (ITACOIL E2543/E) E25x13x7 core, N67 ferrite 1.5 mm gap for 0.7 mH primary inductance Primary: 102 turns 20x0.
Application examples and ideas L6562AT Figure 22. L6562A 80W TM PFC evaluation Figure 23. L6562A 80W TM PFC evaluation board: compliance to EN61000-3-2 board: compliance to JEIDA-MITI standard standard Measurements @ 230Vac Full load EN61000-3-2 class D limits Measurements @ 100Vac Full load 1 Harmonic current (A) Harmonic current (A) 1 0.1 0.01 0.001 0.0001 0.1 0.01 0.001 0.
Application examples and ideas L6562AT Figure 26. L6562A 80W TM PFC evaluation board: power factor vs Vin Figure 27. L6562A 80W TM PFC evaluation board: THD vs Vin 1.00 12 10 0.95 0.90 THD (%) PF 8 Pout = 80W 6 4 0.85 Pout = 80W 2 0 0.80 80 100 120 140 160 180 200 220 240 80 260 100 120 140 160 180 200 220 240 260 Vin (Vac) Vin (Va c) Figure 28. L6562A 80W TM PFC evaluation board: efficiency vs Vin Figure 29.
90 - 265Vac 20/25 2 1 J1 R3 3 620k 620k C1 4 3.3uF 1M5 R1 R3 2 8A/250V F1 C1 3 C2 1 10nF 4 3 2 1 CS 750k R1 0 JP1 02 JUMPER L2 RES L6562A MULT COMP INV 1 470nF-X2 C2 +40 0Vdc 10k L1 R3 4 R1 4 39k 220nF 470nF-X2 C1 CM-1.5mH-5A 1 JP1 01 JUMPER 9.
Package mechanical data 9 L6562AT Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Package mechanical data Table 7. L6562AT DIP-8 mechanical data mm Inch Dim. Min A Typ Min 3.32 Typ Max 0.131 a1 0.51 0.020 B 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022 b1 0.204 0.304 0.008 0.012 D E 10.92 7.95 9.75 0.430 0.313 0.384 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 6.6 0.260 I 5.08 0.200 L 3.18 Z Figure 31. Package dimensions 22/25 Max 3.81 1.52 0.125 0.150 0.
Package mechanical data Table 8. L6562AT SO-8 mechanical data mm. inch Dim. Min Typ Max Min Typ Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D (1) 4.80 5.00 0.189 0.197 E 3.80 4.00 0.15 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ddd 0° (min.), 8° (max.) 0.10 0.004 1.
Revision history 10 L6562AT Revision history Table 9.
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