Specifications
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AI00240
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3、GPIO — General purpose input/output
The general purpose input/output (GPIO) is organized as one port with up to 32 I/Os
(dependent on package) enabling access and control of up to 32 pins through one port.
Each GPIO can be accessed individually.
GPIO has the following user-configurable features:
• Up to 32 GPIO
• 8 GPIO with Analog channels for SAADC, COMP or LPCOMP inputs
• Configurable output drive strength
• Internal pull-up and pull-down resistors
• Wake-up from high or low level triggers on all pins
• Trigger interrupt on state changes on any pin
• All pins can be used by the PPI task/event system
• One or more GPIO outputs can be controlled through PPI and GPIOTE channels
• All pins can be individually mapped to interface blocks for layout flexibility
• GPIO state changes captured on SENSE signal can be stored by LATCH register
The GPIO Port peripheral implements up to 32 pins, PIN0 through PIN31. Each of these pins
can be individually configured in the PIN_CNF[n] registers (n=0..31).
The following parameters can be configured through these registers:
• Direction
• Drive strength
• Enabling of pull-up and pull-down resistors
• Pin sensing
• Input buffer disconnect
• Analog input (for selected pins)
Figure: GPIO Port and the GPIO pin details