Specifications
SUNRISE Technology Co., Ltd. Proprietar
y
&
ConfidentialInformation
Sunrise
AI00240
19
f
DELTA,BLE,1M
Frequencydeviation@BLE1Msps
±250
kHz
f
DELTA,2M
Frequencydeviation@2Msps
±320
kHz
f
DELTA,BLE,2M
Frequencydeviation@BLE2Msps
±500
kHz
fsk
SPS
On‐the‐airdatarate
1
2 Msps
5、SPI — Serial peripheral interface master
The SPI master provides a simple CPU interface which includes a TXD register for sending
data and an RXD register for receiving data. This section is added for legacy support for
now.
Figure: SPI master
RXD-1 and TXD+1 illustrate the double buffered version of RXD and TXD respectively.
SPI master mode pin configuration
The different signals SCK, MOSI, and MISO associated with the SPI master are mapped to
physical pins.
This mapping is according to the configuration specified in the PSELSCK, PSELMOSI,