User's Manual

Chapter 1: Introduction
1-9
1-2 Chipset Overview
The H8QM8-2/H8QME-2 serverboard is based on the nVidia MCP55 Pro and AMD-
8132 chipset. The MCP55 Pro functions as Media and Communications Processor
(MCP) and the AMD-8132 as a PCI-X Tunnel. Controllers for the system memory
are integrated directly into the AMD Opteron processors.
MCP55 Pro Media and Communications Processor
The MCP55 Pro is a single-chip, high-performance HyperTransport peripheral
controller. It includes a 28-lane PCI Express interface, an AMD Opteron 16-bit
Hyper Transport interface link, a six-port (3 Gb/s) Serial ATA interface, a dual-port
Gb Ethernet interface, an ATA133 bus master interface and a USB 2.0 interface.
This hub connects directly to CPU#1.
AMD-8132 HyperTransport PCI-X Tunnel
This hub includes AMD-specifi c technology that provides two PCI-X bridges with
each bridge supporting a 64-bit data bus as well as separate PCI-X operational
modes and independent transfer rates. Each bridge supports up to fi ve PCI masters
that include clock, request and grant signals. This hub connects to the processors
and through them to system memory. It also interfaces directly with the Serial ATA
and Ethernet controllers.
HyperTransport Technology
HyperTransport technology is a high-speed, low latency point to point link that was
designed to increase the communication speed by a factor of up to 48x between
integrated circuits. This is done partly by reducing the number of buses in the
chipset to reduce bottlenecks and by enabling a more effi cient use of memory in
multi-processor systems. The end result is a signifi cant increase in bandwidth
within the chipset.