SUPER H8DAR-T H8DAR-E USER’S MANUAL Revision 1.
The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our web site at www.supermicro.com.
Preface Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8DAR-T/H8DAR-E serverboard. The H8DAR-T/H8DAR-E is based on the AMD-8132/8111 chipset and supports single or dual AMD Opteron 200 series type processors in a 940-pin microPGA ZIF socket and up to 32 GB of DDR333/266 or 16 GB of DDR400.
H8DAR-T/H8DAR-E User’s Manual Table of Contents Preface About This Manual ...................................................................................................... iii Manual Organization ................................................................................................... iii Chapter 1: Introduction 1-1 Overview ......................................................................................................... 1-1 Checklist ...............................................
Table of Contents Universal Serial Bus Ports (USB0/1) ...................................................... 2-10 Extra USB Headers ................................................................................. 2-11 Serial Ports .............................................................................................. 2-11 Fan Headers .......................................................................................... 2-11 Power Fail and Alarm Reset Header .....................................
H8DAR-T/H8DAR-E User’s Manual No Power................................................................................................... 3-1 No Video .................................................................................................. 3-1 Memory Errors........................................................................................... 3-2 Losing the System’s Setup Configuration ................................................ 3-2 3-2 Technical Support Procedures .....................
Chapter 1: Introduction Chapter 1 Introduction 1-1 Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your serverboard. If anything listed here is damaged or missing, contact your retailer.
H8DAR-T/H8DAR-E User’s Manual Contacting Supermicro Headquarters Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web Site: www.supermicro.com Europe Address: Super Micro Computer B.V. Het Sterrenbeeld 28, 5215 ML 's-Hertogenbosch, The Netherlands Tel: +31 (0) 73-6400390 Fax: +31 (0) 73-6416525 Email: sales@supermicro.
Chapter 1: Introduction Figure 1-1.
H8DAR-T/H8DAR-E User’s Manual Figure 1-2.
Chapter 1: Introduction H8DAR-T/H8DAR-E Quick Reference Jumpers Description J3P 3rd Power Fail Signal En/Dis Open (Disabled) JBT1 JI2C1/2 CMOS Clear I2C to PCI Enable/Disable See Section 2-7 Pins 1-2 (Enabled) JPG1 VGA Enable/Disable Pins 1-2 (Enabled) JPL JPS1* JLAN1/JLAN2 En/Disable SATA Enable/Disable Pins 1-2 (Enabled) Pins 1-2 (Enabled) JPS2* SATA Firmware Flash Open (No Flash) JWD Watch Dog Pins 1-2 (Reset) Connectors Description 1U IPMI COM1, COM2 FAN 1-5 J22 J32 J101 J132 J1B4
H8DAR-T/H8DAR-E User’s Manual Serverboard Features CPU • Single or dual AMD dual-core Opteron 200 series 64-bit processors in 940-pin microPGA ZIF sockets Memory • Eight dual/single channel DIMM slots supporting up to 32 GB of registered ECC DDR333/266 or up to 16 GB of registered ECC DDR400 SDRAM Note: Memory capacities are halved for single CPU systems. Refer to Section 2-4 before installing. Chipset • AMD-8132/8111 Expansion Slots • Two (2) 64-bit, 133 MHz PCI-X (3.
Chapter 1: Introduction ACPI Features • Microsoft OnNow • Slow blinking LED for suspend state indicator • BIOS support for USB keyboard • Main switch override mechanism • Internal/external modem ring-on Onboard I/O • Marvell 88SX6081 Serial ATA controller, supports four SATA ports (RAID0, 1 and JBOD supported, H8DAR-T only)* • Two (2) ATA133 IDE ports • One (1) floppy port interface (up to 2.
H8DAR-T/H8DAR-E User’s Manual 184-pin DIMMs 184 -pin DIMMs 16 x 16 Hyper Transport (2000 MT/s) AMD OpteronTM Processor (2) AMD OpteronTM Processor (1) 144-bit, 200 -400 MT/s 144-bit, 200-400 MT/s 16 x 16 Hyper Transport (1200 MT/s) 133 MHz PCI-X Slot Marvell 88 SX6041 Broadcom BC5704 C 133 MHz PCI-X Slot AMD-8132 8 x 8 ncHyper Transport (400 MT/s) ATA133 ATI Rage XL 8 MB AMD-8111 USB 1.
Chapter 1: Introduction 1-2 Chipset Overview The H8DAR-T/H8DAR-E serverboard is based on the AMD-8132TM chipset. This chipset is composed of two main components: the AMD-8132 HyperTransportTM PCI-X Tunnel and the AMD-8111TM HyperTransportTM I/O Hub. The AMD-8132 chipset provides high performance and an excellent feature-set for multi-processor server solutions. Controllers for the system memory are built directly into the processors.
H8DAR-T/H8DAR-E User’s Manual 1-3 PC Health Monitoring This section describes the PC health monitoring features of the H8DAR-T/H8DARE. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU core voltages, +3.3V, +5V, ±12V and Battery Voltage The onboard voltage monitor will scan these voltages continuously. Once a voltage becomes unstable, it will give a warning or send an error message to the screen.
Chapter 1: Introduction 1-4 Power Configuration Settings This section describes the features of your serverboard that deal with power and power settings. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.
H8DAR-T/H8DAR-E User’s Manual WOL capability. Wake-On-LAN must be enabled in BIOS. Note that Wake-On-LAN can only be used with an ATX 2.01 (or above) compliant power supply. Wake-On-Ring Header (JWOR) Wake-up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state. Note that external modem ring-on can only be used with an ATX 2.01 (or above) compliant power supply.
Chapter 1: Introduction 1-6 Super I/O The disk drive adapter functions of the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA logic. The wide range of functions integrated onto the Super I/O greatly reduces the number of components required for interfacing with floppy disk drives.
Chapter 2: Installation Chapter 2 Installation 2-1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions • Use a grounded wrist strap designed to prevent static discharge. • Touch a grounded metal object before removing the board from the antistatic bag.
H8DAR-T/H8DAR-E User's Manual 2-2 Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- ! sor. Always connect the power cord last and always remove it before adding, removing or changing any hardware components. Installing the CPU Backplates Two CPU backplates (BKT-0004) are included in the retail box. The backplates prevent the CPU area of the serverboard from bending and provide a base for attaching the heatsink retention modules.
Chapter 2: Installation 4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and flush with the socket. 5. Gently press the CPU socket lever down until it locks in the plastic tab. For a dual-processor system, repeat these steps to install another CPU into the CPU#2 socket. Note: if using a single processor, only CPU 1 DIMM slots are addressable.
H8DAR-T/H8DAR-E User's Manual 2-3 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis. Make sure that the locations of all the mounting holes for both the serverboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the serverboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly. 1.
Chapter 2: Installation Support The H8DAR-T/H8DAR-E supports single or dual-channel, registered ECC DDR400/333/266 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page and charts on following page). The CPU2 DIMM slots can only be accessed when two CPUs are installed (however, the CPU2 DIMM slots are not required to be populated when two CPUs are installed).
H8DAR-T/H8DAR-E User's Manual Populating Memory Banks for 128-bit Operation CPU1 DIMM1A CPU1 DIMM1B CPU1 DIMM2A CPU1 DIMM2B X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X CPU2 DIMM1A CPU2 DIMM1B X X X X X X X X X X X X CPU2 DIMM2A CPU2 DIMM2B X X X X X X X X X X X X Notes: X indicates a populated DIMM slot.
Chapter 2: Installation 2-5 I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 specification to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3. I/O Port Locations and Definitions Front Control Panel JF1 contains header pins for various front control panel connectors. See Figure 2-4 for the pin definitions of the various connectors. Refer to Section 2-6 for details. Figure 2-4.
H8DAR-T/H8DAR-E User's Manual 2-6 Connecting Cables ATX Power 24-pin Connector Pin Definitions (J1B4) Primary ATX Power Supply Connector Pin# Definition 13 +3.3V 1 +3.3V The primary power supply connector 14 -12V 2 +3.3V (J1B4) on the H8DAR-T/H8DAR-E 15 COM 3 COM meets the SSI (Superset ATX) 24-pin specification. Refer to the table on the 16 PS_ON 4 +5V 17 COM 5 COM right for the pin definitions of the ATX 18 COM 6 +5V 24-pin power connector.
Chapter 2: Installation Power LED Power LED Pin Definitions (JF1) The Power LED connection is located Pin# Definition on pins 15 and 16 of JF1. Refer to the 15 Vcc table on the right for pin definitions. 16 Control HDD LED HDD LED Pin Definitions (JF1) The HDD (IDE Hard Disk Drive) LED connection is located on pins 13 and 14 of JF1. Attach the IDE hard drive LED cable to display disk activity. Refer to the table on the right for pin definitions.
H8DAR-T/H8DAR-E User's Manual Power Fail LED Power Fail LED Pin Definitions (JF1) The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table on the right for pin definitions. This feature is only available Pin# Definition 5 Vcc 6 Control for systems with redundant power supplies. Reset Button Reset Button Pin Definitions (JF1) The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to the hardware reset switch on the computer case.
Chapter 2: Installation Extra USB Headers Extra Universal Serial Bus Headers Pin Definitions (USB2/3/4) Three additional USB1.1 headers (USB2/3/4) are included on the USB2 Pin # Definition USB3/4 Pin # Definition 1 +5V 1 +5V 2 PO- 2 PO- USB cables (not included) are needed 3 PO+ 3 PO+ for the connections. See the table on 4 Ground 4 Ground the right for pin definitions. 5 Key 5 No connection serverboard. These may be connected to provide front side access.
H8DAR-T/H8DAR-E User's Manual Power LED/Speaker PWR LED Connector Pin Definitions (JD1) On JD1, pins 1, 2, and 3 are for the Pin# Definition power LED and pins 4 through 7 are 1 +Vcc for the speaker. See the tables on the right for pin definitions. 2 -Vcc 3 -Vcc Speaker Connector Pin Definitions (JD1) Note: The speaker connector pins are for use with an external speaker.
Chapter 2: Installation Chassis Intrusion Chassis Intrusion Pin Definitions (JL1) A Chassis Intrusion header is located Pin# Definition at JL1. Attach the appropriate cable 1 Intrusion Input to inform you of a chassis intrusion. 2 Ground JLAN1/2 (Ethernet Ports) Two Gigabit Ethernet ports (designated JLAN1 and JLAN2) are located beside the VGA port. These ports accept RJ45 type cables.
H8DAR-T/H8DAR-E User's Manual Overheat LED (JOH1) Overheat LED Pin Definitions (JOH1) Connect an LED to the JOH1 header to provide warning of chassis over- Pin# Definition heating. See the table on the right for pin definitions. 1 +5V 2 OH Active Serial ATA Activity LED Pin Definitions (JS9) Serial ATA Activity LED Pin # Connect an LED to the JS9 header to provide indication of Serial ATA drive activity. See the table on the right for pin definitions.
Chapter 2: Installation 2-7 Jumper Settings Explanation of Jumpers To modify the operation of the serverboard, jumpers can be used to 3 2 1 3 2 1 Connector Pins choose between optional settings. Jumpers create shorts between two pins to change the function of the Jumper connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram at right for an example of jumping pins 1 and 2. Refer to the serverboard layout page for jumper locations.
H8DAR-T/H8DAR-E User's Manual JLAN1/2 Enable/Disable Change the setting of jumper JPL JLAN1/2 Enable/Disable Jumper Settings (JPL) to enable or disable the JLAN1 and Jumper Setting Definition JLAN2 Gb Ethernet ports. See the table on the right for jumper settings. Pins 1-2 Enabled Pins 2-3 Disabled The default setting is enabled VGA Enable/Disable JPG1 allows you to enable or disable the VGA port. The default position is on pins 1 and 2 to enable VGA.
Chapter 2: Installation Onboard Speaker Enable/ Disable The JD1 header allows you to use either an external speaker or the internal (onboard) speaker. To use the internal (onboard) speaker, close pins 6 and 7 with a jumper. To use an external speaker, connect the speaker Onboard Speaker Enable/Disable Pin Definitions (JD1) Pins Definition 6-7 Jump for onboard speaker 4-7 Attach external speaker wires wires to pins 4 through 7 of JD1.
H8DAR-T/H8DAR-E User's Manual SATA Firmware Flash (H8DAR-T) SATA Firmware Flash Jumper Settings (JPS2) Jumper JPS2 is used to flash the firm- Jumper Setting ware for the SATA controller. The default setting is open. See the table on right for jumper settings. Definition Open Normal Closed Flash Firmware Note: this jumper is intended for manufacturing purposes only. 2-8 Onboard Indicators JLAN1/JLAN2 LEDs The Ethernet ports (located beside the VGA port) have two LEDs.
Chapter 2: Installation 2-9 Floppy, IDE and SATA Drive Connections Use the following information to connect the floppy and hard disk drive cables. The floppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives.
H8DAR-T/H8DAR-E User's Manual IDE Connectors IDE Drive Connectors Pin Definitions (JIDE#1/JIDE#2) There are no jumpers to config- Pin# Definition ure the onboard IDE#1 and #2 1 Reset IDE 2 Ground connectors. See the table on the right for pin definitions.
Chapter 2: Installation 2-10 Enabling SATA RAID Now that the hardware is set up, you must now install the operating system and the SATA RAID drivers, if you wish to use RAID with your SATA drives. The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a separate non-RAID drive. See the instructions below for details.
H8DAR-T/H8DAR-E User's Manual Adaptec HostRAID Controller/Driver Adaptec's Embedded Serial ATA RAID with HostRAID controller adds RAID functionality to the SATA I/O controller by supporting RAID 0 (Striping) or RAID 1 (Mirroring) to enhance the industry's pioneer PCI-to-e host controller products. RAID striping (RAID 0) can greatly improve hard disk I/O performance because of its capability in striping data across multiple drives.
Chapter 2: Installation Viewing Array Properties To view the properties of an existing array: 1. At the BIOS prompt, press . 2. From the ARC menu, select Array Configuration Utility (ACU). 3. From the ACU menu, select Manage Arrays. 4. From the List of Arrays dialog box, select the array you want to view and press . The Array Properties dialog box appears, showing detailed information on the array. The physical disks associated with the array are displayed here. 5.
H8DAR-T/H8DAR-E User's Manual 2. From the ARC menu, select Array Configuration Utility Main Menu (ACU). 3. From the ACU menu select Create Array. 4. Select the disks for the new array and press . Note: To deselect any disk, highlight the disk and press . 5. Press when both disks for the new array are selected. The Array Properties menu is then displayed. Assigning Array Properties Once you've create a new array, you are ready to assign properties to the array.
Chapter 2: Installation 5. When finished, press Done (as shown on the following screen). Notes 1. Before adding a new drive to an array, back up any data contained on the new drive. Otherwise, all data will be lost. 2. If you stop the build or clear process on a RAID 1 from ACU, you can restart it by pressing + . 3. A RAID 1 created using the Quick Init option may return some data mis-compares if you later run a consistency check. This is normal and is not a cause for concern. 4.
H8DAR-T/H8DAR-E User's Manual bootable? (Yes/No):" The bootable array will then be deleted and the asterisk will disappear. Note: do not use the delete key to delete a bootable array. Adding/Deleting Hotspares Note: In order to rebuild a RAID (RAID 0 or RAID 1), you need to add a new HDD as a hotspare. 1. Turn on your computer and press + as prompted to access the ARC Utility. 2. From the ARC menu, select Array Configuration Utility (ACU). 3. From the ACU menu, select Add/Delete Hotspares. 4.
Chapter 2: Installation 7. Read the warning message as shown on the screen below. 8. Make sure that you have selected the correct disk drives to initialize. If correct, type Y to continue. Rebuilding Arrays Note 1: Rebuilding applies to Fault Tolerant arrays (RAID 1) only. If an array build process (or initialization) is interrupted or critical with one member missing, you must perform a rebuild to optimized its functionality. For a critical array rebuild operation, the optimal drive is the source drive.
H8DAR-T/H8DAR-E User's Manual Notes 2-28
Chapter 3: Troubleshooting Chapter 3 Troubleshooting 3-1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components. Before Power On 1.
H8DAR-T/H8DAR-E User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed. 2. You should be using registered ECC DDR memory (see next page). Also, it is recommended that you use the same memory type and speed for all DIMMs in the system. See Section 2-4 for memory details and limitations. 3.
Chapter 3: Troubleshooting 3. If you still cannot resolve the problem, include the following information when contacting us for technical support: Serverboard model and PCB revision number BIOS release date/version (this can be seen on the initial display when your system first boots up) System configuration An example of a Technical Support form is posted on our web site. 4.
H8DAR-T/H8DAR-E User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power Button Mode setting. When the Instant Off setting is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system. When the 4-Sec.
Chapter 4: BIOS Chapter 4 BIOS 4-1 Introduction This chapter describes the AMIBIOS™ Setup utility for the H8DAR-T/H8DAR-E. The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reflected in this manual.
H8DAR-T/H8DAR-E User's Manual 4-2 Main Setup When you first enter AMI BIOS Setup Utility, you will see the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main Setup screen provides you with a system overview, which includes the version, built date and ID of the AMIBIOS, the type, speed and number of the processors in the system and the amount of memory installed in the system.
Chapter 4: BIOS IDE Configuration Onboard PCI IDE Controller The following options are available to set the IDE controller status: Disabled will disable the controller. Primary will enable the primary IDE controller only. Secondary will enable the secondary IDE controller only. Both will enable both the primary and the secondary IDE controllers. Primary IDE Master/Slave, Secondary IDE Master/Slave Highlight one of the four items above and press to access the submenu for that item.
H8DAR-T/H8DAR-E User's Manual data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11.1 MBs. Select 4 to allow AMI BIOS to use PIO mode 4 for a data transfer rate of 16.6 MBs. This setting generally works with all hard disk drives manufactured after 1999.
Chapter 4: BIOS Floppy Configuration Floppy A Move the cursor to these fields via up and down keys to select the floppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½". Floppy B Move the cursor to these fields via up and down keys to select the floppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".
H8DAR-T/H8DAR-E User's Manual Parallel Port Address This option specifies the I/O address used by the parallel port. Select Disabled to prevent the parallel port from accessing any system resources. When the value of this option is set to Disabled, the printer port becomes unavailable. Select 378 to allow the parallel port to use 378 as its I/O port address. The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting.
Chapter 4: BIOS BIOS --> AML ACPI Table When Enabled, BIOS-->AML exchange table pointer to be included in (X) REDT pointer list. Options are Enabled and Disabled. Headless Mode Select "Enabled" to activate the Headless Operation Mode through ACPI. The options are Enabled and Disabled. OS Console Redirection When "Enabled", BIOS provides additional options to select remote access type. The options are Enabled and Disabled. PME, R1 S5 Wake Up The options are Enabled and Disabled.
H8DAR-T/H8DAR-E User's Manual CPU0: CPU1 HT Link1 Width The HT link will run at the width specified in this setting. Options are Auto, 2 bit, 4 bit, 8 bit and 16 bit. CPU0: PCI-X0 HT Link1 Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable. Options are Auto, 200 MHz, 400 MHz and 600 MHz. CPU0: PCI-X0 HT Link1 Width The HT link will run at the width specified in this setting.
Chapter 4: BIOS System Health Monitor CPU Overheat Temperature Use the "+" and "-" keys to set the CPU temperature threshold to between 65o and 90o C. When this threshold is exceeded, the overheat LED on the chassis will light up and an alarm will sound. The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set. The default setting is 78o C.
H8DAR-T/H8DAR-E User's Manual 4-4 PCI/PnP Menu Plug & Play OS Select Yes to allow the OS to configure Plug & Play devices. (This is not required for system boot if your system has an OS that supports Plug & Play.) Select No to allow AMIBIOS to configure all devices in the system. PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus. Select a value to set the PCI latency in PCI clock cycles. Options are 32, 64, 96, 128, 160, 192, 224 and 248.
Chapter 4: BIOS DMA Channel 0/Channel 1/Channel 3/Channel 5/Channel 6/Channel 7 Select Available to indicate that a specific DMA channel is available to be used by a PCI/PnP device. Select Reserved if the DMA channel specified is reserved for a Legacy ISA device. The options are Available and Reserved. Reserved Memory Size This feature specifies the size of memory block to be reserved for Legacy ISA devices. The options are Disabled, 16K, 32K and 64K.
H8DAR-T/H8DAR-E User's Manual Wait for ‘F1’ If Error Enable to activate the Wait for F1 if Error function. The options are Enabled and Disabled. Hit ‘DEL’ Message Display Enable to display the message telling the user to hit the DEL key to enter the setup utility. The options are Enabled and Disabled. Interrupt 19 Capture Enable to allow ROMs to trap Interrupt 19. The options are Enabled and Disabled.
Chapter 4: BIOS CD/DVD Drives This feature allows the user to specify the boot sequence from available CDROM drives. 1st Drive Specifies the boot sequence for the 1st Hard Drive. 4-6 Security Menu AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first. Change Supervisor Password Select this option and press to access the sub menu, and then type in the password.
H8DAR-T/H8DAR-E User's Manual 4-7 Chipset Menu North Bridge Configuration Memory Configuration Memclock Mode This setting determines how the memory clock is set. Auto has the memory clock set by the code and Limit allows the user to set a standard value. MCT Timing Mode Sets the timing mode for memory. Options are Auto and Manual. User Configuration Mode Options are Auto and Manual. Burst Length Use this setting to set the memory burst length. 64-bit Dq must use 4 beats.
Chapter 4: BIOS ECC Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automatically. Options are Enabled and Disabled. MCA DRAM ECC Logging When "Enabled", MCA DRAM ECC logging and reporting is enabled. Options are Enabled and Disabled. ECC Chip Kill Allows the user to Enable or Disable ECC Chip Kill. DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately, even with background scrubbing on. Options are Enabled and Disabled.
H8DAR-T/H8DAR-E User's Manual South Bridge Configuration 2.0 SMBus Controller Allows the user to Enable or Disable the SMBus controller. HT Link0 P-Comp Mode Allows user to set values for this mode. Options are Auto (hardware compensation values), Data (allows user to override auto values with an absolute value), CalComp + Data (allows user to add to the generated value) and CalComp - Data (allows user to subtract from the generated value). HT Link0 N-Comp Mode Allows user to set values for this mode.
Chapter 4: BIOS 4-8 Power Menu Power Button Mode Allows the user to change the function of the power button. Options are Instant Off and 4-Sec. Delay. Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power. The options are Power Off, Power On and Last State. Watch Dog Timer This setting is used to enable or disabled the Watch Dog Timer function.
H8DAR-T/H8DAR-E User's Manual 4-9 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit When you have completed the system configuration changes, select this option to leave BIOS Setup and reboot the computer, so the new system configuration parameters can take effect. Select Save Changes and Exit from the Exit menu and press .
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen. Fatal errors are those which will not allow the system to continue the boot-up procedure.
H8DAR-T/H8DAR-E User's Manual Notes A-2
Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. B-1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint Code Description D0h The NMI is disabled. Power on delay is starting.
H8DAR-T/H8DAR-E User's Manual B-2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description E0h The onboard floppy controller if available is initialized. Next, beginning the base 512 KB memory test. E1h Initializing the interrupt vector table next. E2h Initializing the DMA and Interrupt controllers next. E6h Enabling the floppy drive controller and Timer IRQs. Enabling internal cache memory.
Appendix B: BIOS POST Checkpoint Codes B-3 Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description 03h The NMI is disabled. Next, checking for a soft reset or a power on condition. 05h The BIOS stack has been built. Next, disabling cache memory. 06h Uncompressing the POST code next. 07h Next, initializing the CPU and the CPU data area.
H8DAR-T/H8DAR-E User's Manual Checkpoint Code Description 25h Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. 27h Any initialization before setting video mode will be done next. 28h Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next. 2Ah Bus initialization system, static, output devices will be done next, if present. See the last page for additional information.
Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description 4Ch The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. 4Dh The memory above 1 MB has been cleared via a soft reset. Saving the memory size next. Going to checkpoint 52h next. 4Eh The memory test started, but not as the result of a soft reset. Displaying the first 64 KB memory size next. 4Fh The memory size display has started. The display is updated during the memory test.
H8DAR-T/H8DAR-E User's Manual Checkpoint Code Description 86h The password was checked. Performing any required programming before WINBIOS Setup next. 87h The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. 88h Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next. 89h The programming after WINBIOS Setup has completed.
Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description A9h Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Aah Initialization after E000 option ROM control has completed. Displaying the system configuration next. Abh Uncompressing the DMI data and executing DMI POST initialization next. B0h The system configuration is displayed. B1h Copying any code to specific areas.
H8DAR-T/H8DAR-E User's Manual (continued from front) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage.
