User's Manual (1.0)

Chapter 5: Advanced Serverboard Setup
5-11
X10DRG-H(T) Jumpers
Jumper Description Default Setting
JBT1 Clear CMOS See section 5-8
JPB1 BMC Enable Pins 1-2 (Enabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1 GLAN1/GLAN2 Enable (X10DRG-H)
10_GLAN1/10G_LAN2 Enable (X10DRG-HT)
Pins 1-2 (Enabled)
JPME2 Manufacture (ME) Mode Select Pins 1-2 (Normal)
JWD1 Watch-Dog Timer Enable Pins 1-2 (Reset)
X10DRG-H(T) Connectors
Connectors Description
Battery (BT1) Onboard CMOS Battery (See Chpt. 3 for used battery
disposal)
COM1 Backplane COM port
FAN 1/2/3/4, FAN
A/B/C/D/E/F/G/H
CPU/System fan headers (Fan 1-4, Fan A-H)
JF1 Front_Panel_Control header
JL1 Chassis intrusion
JPC1 3-pin header
JPCIE1_1 Proprietary SPEC Slot 1 (See Note 1 on Page 1-6.)
JPCIE1_3 Proprietary SPEC Slot 1 (See Note 1 on Page 1-6.)
JPW1 Proprietary main power connector
JPW2 8-pin power connector
JPW3/JPW4/JPW5/
JPW6/JPW7
12V 8-Pin power connectors used for HDD backplane
(BPN) or GPU add-on cards
JSPK1 Internal buzzer/speaker
JSTBY1 Standby power connector
JTPM1 TPM (Trusted Platform Module)/Port 80 header
LAN1/LAN2 G-bit Ethernet (GLAN) ports 1/2 (for X10DRG-H)
10 G-bit Ethernet (GLAN) ports 1/2 (for X10DRG-HT)
(IPMI)_LAN IPMI_Dedicated LAN support by the Aspeed controller
(I-)SATA 0-5 Intel SATA 3.0 connectors (0-5) from Intel PCH
(S)-SATA0-3 SATA connectors (0-3) from Intel SCU
T-SGPIO1/2/3 Serial_Link General-Purpose I/O (SGPIO) headers for
I-SATA connections (I-SGPIO1 for I-SATA0-3, I-SGPIO2
for I-SATA4/5, I-SGPIO3 for S-SATA0-3)
(CPU1) SLOT1/3 PCI-Exp. 3.0 x16 Slot1/Slot3 supported by CPU1
(CPU2) SLOT2/4 PCI-Exp. 3.0 x16 Slot2/Slot4 supported by CPU2
(CPU2) SLOT5 PCI-Exp. 3.0 x8 in x16 slot supported by CPU2