User`s manual

Chapter 1: Introduction
1-5
Figure 1-1. Intel PCH-C612 Chipset:
System Block Diagram
Note: This is a general block diagram. Please see Chapter 5 for details.
x16
P1
P1
P0
P0
CPU FRONT
CPU
DMI
PE1
PE2
PE3
PE3
PE1PE2
DDR4 DIMM
4,5
port 0,1
REAR
DDR4 DIMM
#1
#2
DDR4 DIMM
A
G
x16
RIGHT
SLOT
SXB2
PCIE 3.0
x16
x16
RJ45
JLAN1
UL1
RJ45
JLAN2
PHY
RTL8211E
PET
[3,4,6,7]
DMI
PET5
LPC
USB2.0
[6]
QPI
Dual
LAN
I350BT2
PROCESSOR
PROCESSOR
QPI
DDR4 DIMM
#2
#1
DDR4 DIMM
DDR4 DIMM
BMC
SATA
Gen3
[0..5]
2,3
REAR
AST2400
DDR4 DIMM
B
DDR4 DIMM
C
D
SocketID 01
E
H
F
#1
#2
#1
#2
#1
2#
2
#
#1
#1
#2
#1
#2
x16
Left
SLOT
SXB1B
(lower)
PCIE
3.0
x16
SocketID 00
Left
SLOT
SXB1B
(Upper)
PCIE
3.0x16
AOM
J35
PCIE 3.0
x16
PCH
SPI
SPI
FLASH
32MB
BMC
DDR3
VGA
IPMI
LAN
RJ45
TPM Header
sSATA
Gen3
[0..3]
HDR
2x5
WIO Slots
SXB1A
SXB1B
SXB1C
SXB2
PCIE x16
Upper Lower
PCIE x16 PCIE x16
Left Slot
Right Slot
HWM
COM1
USB2.0
[0..5]
USB3.0
[1..6]
NC _SI(RMII)
x8
S-SATA3
SPI
FLASH
16MB
BIOS
DMI
S-SATA2
S-SATA1
S-SATA0
I-SATA0 I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
Rear