Computer Hardware User Manual

Chapter 2: Installation
2-21
DIMM A6
DIMM B6
DIMM B2
DIMM A2
DIMM B5
DIMM A5
JRB1
24-Pin ATX PWR
CPU 4
CPU 3
COM
2
ICH5R
JPL1
JP13
Sl
ot 5 PCI-Ex4(in x8 Slot)
Battery
JPG1
SCSI Channe
l A
I-SATA1
IPMI
IDE #2
Fan1
VGA
CTRL
USB2/3
KB/
Mouse
USB0/1
COM1
VGA
(South Bridge)
DIMM B1
DIMM A1
X6QT8
®
SUPER
WOL1
I-SATA2
Fan2
GLAN2
DIMM B8
DIMM A8
DIMM B7
DIMM A7
Fan7
Fan8
GLAN1
DIMM A3
DIMM B3
DIMM A4
Fan9
GLAN
CTRL
Slot 6 PCI-Ex8(inx16 slot)
BIOS
Sl
ot 4 PCI-X
133M
Hz
Sl
ot 3 PCI-X 133MH
z
Sl
ot 2 PCI-X 133MHz
Slot 1 PCI-X 100MH
z (*: ZCR/Green S
lot: X6QT8)
S I/O
J3P1
JAR1
SMB
JL1
WOR1
SCSI Channe
l B
IDE #1
PSSM
B
WD1
Fan3
Fan4
CPU 2
CPU 1
Fan6
Fan5
LE1
JD1
UXMB1
UXMB2
UXMB3
DA1
DA2
J27
JPA1
8-Pin PW
8-Pin PW
UXMB4
E8501
(North Bridge)
PXH
PXH
SCSI
AIC790
2W
DIMM B4
JPA2
JWF1
Floppy
JOH1
JPA3
JBT1
JWF2
SPKR
CPLD
JFSB1
JTAG
FP CTRL
A. JTAG
B. Alarm Reset
A
JTAG Connector
JTAG Connector located next to the IDE2
connector allows you to configure the
onboard CPLD (-Complex Programmable
Logic Device.) See the table on the right
for pin defi nitions.
JTAG Connector
Pin# Defi nition
Pin 1 Ground
Pin 2 TLK
Pin 3 TD0
Pin 4 TD1
Pin 5 TMS
Pin 6 3.3 V
Alarm Reset (JAR1)
The system will notify you in the event of
a power supply failure. This feature is only
available for chassis with Supermicro redun-
dant power supply units installed. If you only
have a single power supply installed, you
should not connect anything to this header
(JAR1) to prevent false alarms. See the table
on the right for jumper settings.
Alarm Reset
Jumper Settings
Jumper Setting Defi nition
Open
(*Default)
Enabled*
Closed Disabled
B