User's and BIOS Manual (1.0c)

Chapter 7: BIOS
7-11
Memory Branch Mode
This option allows BIOS to enumerate Host Mode for Device 16, Function 1, Reg.
40h bit 16 and Reg. 58h [14]. The options are Interleave, Sequential, Mirroring,
and Single Channel 0.
Branch 0 Rank Interleave
Select the interleave for Branch 0 rank. The options are 1:1, 2:1 and 4:1.
Branch 0 Rank Sparing
Select enable to enable the sparing feature for Branch 0 rank. The options are
Enabled and Disabled.
Branch 1 Rank Interleave
Select the interleave for Branch 1 rank. The options are 1:1, 2:1 and 4:1.
Branch 1 Rank Sparing
Select enable to enable the sparing feature for Branch 1 rank. The options are
Enabled and Disabled.
Enhanced x8 Detection
Select Enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are Disabled and Enabled.
Crystal Beach Features
This feature cooperates with Intel's I/O AT (Acceleration Technology) to accelerate the
performance of TOE devices. (A TOE device is a specialized, dedicated processor
that is installed on an add-on card or a network card to handle some or all packet
processing of the add-on card. For this motherboard, the TOE device is built inside
the ESB 2 South Bridge chip.) The options are Enabled and Disabled.
Route Port 80h Cycles to
This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.
Clock Spectrum Feature
If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.
Enabling Multi-Media Timer
Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.