User's Manual

IA9Q5 S83D-E MODULE V3 page - 12 -
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8. Interface
Fig 8.1 Pin sequence of S83D-E Module (Bottom View)
Pin Name I/O TX Function Define RX Function Define
1 VCCIO P DC 3.0 ~ 3.6V IN DC 3.0 ~ 3.6V IN
2 DGND P Digital GND Digital GND
3 SPB_I2S_MCLK I/O
SPB I2S audio MCLK system
clock output
SPB
I2S audio MCLK system clock
output
4 GPIO 32 I/O GPIO AMP MUTE
5 GPIO 14 I/O GPIO GPIO
6 GPIO 31 I/O GPIO GPIO
7 GPIO 17 I/O GPIO GPIO
8 GPIO 36 I/O
I2C_BUSY，Module Pull High I2C_BUSY，Module Pull High
9 I2C_CLK I/O I2C Master/Slave clock signal I2C Master/Slave clock signal
10 I2C_DATA I/O I2C Master/Slave data signal I2C Master/Slave data signal
11 DGND P Digital GND Digital GND
12 DGND P Digital GND Digital GND
13 GPIO 27 I/O GPIO Pairing
14 GPIO 21 I/O GPIO GPIO
15 GPIO 16 I/O GPIO ON/OFF 12V
16 GPIO 34 I/O I2S Master/Slave Select I2S Master/Slave Select
17 M_RESET(PORN) I/O Internal power on reset (1) Internal power on reset (1)
18 I2C_CLK I/O I2C Master/Slave clock signal I2C Master/Slave clock signal
19 I2C_DATA I/O I2C Master/Slave data signal I2C Master/Slave data signal
20 GPIO 30 I/O GPIO AMP RESET(L Act)
21 SPA_I2S_DATA I/O I2S DATA 0 SYNC LED
22 SPB_I2S_LRCK I/O SPB I2S audio LRCK SPB I2S audio LRCK
23 DGND P Digital GND Digital GND
24 SPB_I2S_BCK I/O SPB I2S audio BCK SPB I2S audio BCK
25 GPIO 15 I/O GPIO ON/OFF 3.3V
26 SPB_I2S_DATA I/O SPB I2S audio Data SPB I2S audio Data
Table 8 IO Function Define
Note : (1) *.
Not need external RC circuit to do RC reset
*.Power On Reset Characteristics can reference section 5 Electrical Specification (page 6)
*.External controller can direct control M_RESET but should assign the control IO as input for normal operation
and output low to Reset S83D-E Module