DataSheet_SB16C1053APCI_v106

SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
29
8.1.11.3 Base Address register 2
When SB16C1053APCI is in 1P and 2S1P mode, Base Address Register2(BAR2)
automatically sets the size of the Address Space of Parallel Port Register. The I/O
address space is 00~07h.
When SB16C1053APCI is in 4S mode, Base Address Register2(BAR2) automatically
sets the size of the Address Space of an external UART (3
rd
UART) Register. The I/O
address space is 00~07h.
When SB16C1053APCI is in 6S mode, Base Address Register2(BAR2) automatically
sets the size of the Address Space of two external UART(3
rd
& 4
th
UART) Register. The
I/O address space is 00~0Fh.
When SB16C1053APCI is in 1S and 2S mode, BAR2 is not used.
8.1.11.4 Base Address register 3
When SB16C1053APCI is in 1P and 2S1P mode, Base Address Register3(BAR3)
automatically sets the size of the Address Space of extended Parallel Port Register in
ECP mode. The I/O address space is 00~07h.
When SB16C1053APCI is in 4S mode, Base Address Register3(BAR3) automatically
sets the size of the Address Space of an external UART (4
th
UART) Register. The I/O
address space is 00~07h.
When SB16C1053APCI is in 6S mode, Base Address Register3(BAR3) automatically
sets the size of the Address Space of two external UART (5
th
& 6
th
UART) Register. The
I/O address space is 00~0Fh.
When SB16C1053APCI is in 1S and 2S mode, BAR3 is not used.
8.1.11.5 Base Address register 4
SB16C1053APCI contains Option Registers area which controls overall operations of
the SB16C1053APCI. The Option Registers are made by SystemBase for users to
control and manage Serial Multi-Port more easily and conveniently. Users and software
developers can easily control Serial Interface of Multi-Port with them.
SB16C1053APCI sets this area with Base Address Register4(BAR4). I/O Address space
size of the Option I/O Register is from 00 to 1Fh. Option Registers indicate information
on the six operating modes, the Line Interface through the pin, Oscillator, Interrupt and
SB16C1053APCI. See 11. Option I/O Space for more details.
8.1.11.6 Base Address register 5
In SB16C1053APCI, Base Address Register5(BAR5) is not used and reserved area.