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DataSheet_SB16C1053APCI_v106

ManualsBrandsSystemBase ManualsElectronic ComponentsPCI to Dual UART and Single Parallel with MIO Bus Bridge Controller, 128-pin TQFP - 90pcs Bundle
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SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
7
1. Description
SB16C1053APCI is a PCI Target Interface Controller with Dual-UART, single Parallel Port
and MIO Bus
TM
. It offers easy PCI Target Card Adapter implementation for serial port and
parallel port. SB16C1053APCI provides high performance serial and parallel port
communication. With a built-in two SB16C1050A Core that has built-in 256-byte FIFO,
SB16C1053APCI decreases CPU load, is stronger at errors such as Overrun error and
works well with simultaneous use of multiple ports. Furthermore, it is capable of waking
up PC that is powered off through interrupts or Wake-up Requests with PCI Power
Management implemented. SB16C1053APCI supports up to 6 serial ports extension,
provides RS422/485 Auto Toggling function and Global Interrupt Function to the built-in
UART allowing a more convenient handling of serial communication at driver level.
Finally, with SB16C1053APCI, it is easy to design various modes of Serial and Parallel
Multi-Port as below:
- 1-port Serial Multi-Port PCI card adapter (1S mode)
- 2-port Serial Multi-Port card adapter (2S mode)
- 4-port Serial Multi-Port card adapter (4S mode)
- 6-port Serial Multi-Port card adapter (6S mode)
- 1-port Parallel Multi-Port card adapter (1P mode)
- 2-port Serial and 1-port Parallel Multi-Port card adapter (2S1P mode)
SB16C1053APCI offers TQFP128 packages.
2. Features
2.1 PCI Interface
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Compliant with PCI Local Bus Specification 2.3
Supports 32-bit Bus / 33MHz and 66MHz
Supports data transmission of max. 264MB/sec
Supports PCI Power Management 1.2
Supports CompactPCI and CompactPCI Hot Swap
Download Configuration Data from external serial EEPROM
3.3V Operation
5V Tolerant Inputs
2.2 Internal Dual-UART
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2 Channel High Performance UART with 16C1050A core
Up to 5.3 Mbps Baud Rate (Up to 85 MHz Oscillator Input Clock)
256-byte Transmit FIFO
256-byte Receive FIFO with Error Flags
Programmable and Selectable Transmit and Receive FIFO Trigger Levels for
Interrupt Generation
9-bit Communication (Multi-drop with Auto Address Detection)