DataSheet_SB16C1053APCI_v106
SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
94
14. MIO Bus Description
SB16C1053APCI can extend to 2 serial ports or 4 serial ports additionally using external
UART. Because SB16C1053APCI have multi-function pins, some pins works as MIO
Bus
TM
signals when SB16C16C1053APCI is in 4S mode or 6S mode.
In this chapter, you can get information about the MIO Bus
TM
signal and the interfacing
between SB16C1053APCI and external Quad-UART.
MIO Bus
TM
is devised by SystemBase and it is similar with ISA bus.
14.1 MIO Bus
TM
Signal Descriptions
WAKEREQ
PORT[1]_MCS2#
MIRQ3
TXD0
RXD0
DCD0#
70
89
STOP#
C/BE[1]#
AD[7]
GND
5
1
AD[27]
56 105
AD[29]
3
NC - No internal connection
DSR0#
79
100
54
AD[26]
RSVD0/GPO[1]
TXEN0_INTF0[0]
PCI_33M#
MD[3]
DTR1#
DSR1#
108
118
66
32
PERR#
AD[5]
17
121
59
72
PME#
99
14
DTR0#
CLK
87
C/BE[3]#
MCS3#_OSC[2]
MD[6]
NC
28
PORT[2]_MA[2]
GND
MIRQ1
RTS0#
22
AD[21]
AD[14]
XTAL1
64
77
83
88
103
AD[13]
RXEN0#_INTF0[1]
MD[1]
RI1#
58
42
NC
35
IDSEL
NC
33
95
120
97
126
112
18
36
74
13
117
AD[1]
VCC
RTS1#
GNT#
11
6
NC
82
34
55
123
109
61
16
15
MRESET
GND
85
AD[23]
AD[22]
AD[8]
C/BE[0]#
50
AD[11]
VCC
RXD1
DCD1#
119
65
26
AD[31]
LOCK#
AD[30]
78
124
110
62
86
115
23
94
2
C/BE[2]#
MA[1]_OSC[1]
INTF1[2]_MA[0]
60
51
41
76
57
122
TXD1
AD[24]
VCC
AD[15]
MD[2]
MD[0]
10
102
63
8
12
92
INTA#
127
113
VCC
47
GND
DEVSEL#
SERR#
NC
27
53
98
107
68
30
VCC
24
125
111
EE_SCL
TXEN1_INTF1[0]
PORT[0]_MCS0#
VCC
AD[18]
PAR
AD[10]
AD[3]
AD[2]
45
81
106
69
29
49
25
114
40
128
9
104
71
52
37
MIRQ2
MD[7]
MD[4]
GND
REQ#
FRAME#
IRDY#
AD[6]
NC
MIRQ0
4
19
7
91
48
93
38
21
RST#
AD[28]
20
RI0#
AD[4]
VCC
XTAL2
EE_SDA
CTS1#
CTS0#
96
AD[20]
AD[16]
MIOW#
NC
GND
GPO[0]
TRDY#
AD[12]
GND
AD[0]
PMES_INTF0[2]
67
31
75
116
AD[19]
GND
84
73
39
46
GND
AD[25]
NC
44
90
43
RXEN1#_INTF1[1]
MIOR#_OSC[0]
MCS1#
MD[5]
VCC
101
80
AD[17]
AD[9]
SIX SERIAL PORT MODE
SB16C1053APCI-TQ