DataSheet_SB16C1053APCI_v106
SB16C1053APCI
PCI Target Controller with 2 Serial, 1 Parallel and MIO Bus
PCI to 2S+1P with MIO Bus Bridge
JULY 2013 REV 1.06
99
Table 15–1: Register Programming Guide…continued
Command
Action
Read 256-byte TX FIFO Empty Status /
RX FIFO Full Status
Set FCR to xxxx_xxx1b
Read LCR, save in temp1
Set LCR to BFh
Set PSR to A5h
Set AFR to 01h
Set PSR to A4h
Set LCR to temp1
Read ISR, save in temp2
Pass temp2 back to host
Enable Xoff Re-transmit
Read LCR, save in temp1
Set LCR to not BFh
Read MCR, save in temp2
Set MCR to (0100_0000b OR temp2)
Set MCR to (0100_0100b OR temp2)
Set MCR to (1011_1111b AND temp2)
Set MCR to temp2
Set LCR to temp1
Disable Xoff Re-transmit
Read LCR, save in temp1
Set LCR to not BFh
Read MCR, save in temp2
Set MCR to (0100_0000b OR temp2)
Set MCR to (1011_1011b AND temp2)
Set MCR to temp2
Set LCR to temp1
Set Prescaler Value to Divide-by-1 or 4
Read LCR, save in temp1
Set LCR to BFh
Read EFR, save in temp2
Set EFR to (0001_0000b OR temp2)
Set LCR to 00h
Read MCR, save in temp3
if Divide-by-1 = OK then
Set MCR to (0111_1111b AND temp3)
else
Set MCR to (1000_0000b OR temp3)
Set LCR to BFh
Set EFR to temp2
Set LCR to temp1