SB16C1054_Data Sheet_EN

SB16C1054
QUAD UART WITH 256-BYTE FIFO
FEBRUARY 2009 REV 1.0
5
28
7.3 Interrupt Enable Register (IER, Page 0)
IER enables each of the seven types of Interrupt, namely receive data ready, transmit
empty, line status, modem status, Xoff received, RTS# state transition from low to high,
and CTS# state transition from low to high. All interrupts are disabled if bit[7:0] are
cleared. Interrupt is enabled by setting appropriate bits. Table 9 shows IER bit settings.
Table 9: Interrupt Enable Register Description
Bit Symbol Description
7 IER[7] CTS# Interrupt Enable (Requires EFR[4] = 1).
0 : Disable the CTS# interrupt (default).
1 : Enable the CTS# interrupt.
6 IER[6] RTS# Interrupt Enable (Requires EFR[4] = 1).
0 : Disable the RTS# interrupt (default).
1 : Enable the RTS# interrupt.
5 IER[5] Xoff Interrupt Enable (Requires EFR[4] = 1).
0 : Disable the Xoff interrupt (default).
1 : Enable the Xoff interrupt.
4 IER[4] Sleep Mode Enable (Requires EFR[4] = 1).
0 : Disable sleep mode (default).
1 : Enable sleep mode.
3 IER[3] Modem Status Interrupt Enable
0 : Disable the modem status register interrupt (default).
1: Enable the modem status register interrupt.
2 IER[2] Receive Line Status Interrupt Enable
0 : Disable the receive line status interrupt (default).
1: Enable the receive line status interrupt.
1 IER[1] Transmit Holding Register Interrupt Enable
0 : Disable the THR interrupt (default).
1 : Enable the THR interrupt.
0 IER[0] Receive Buffer Register Interrupt Enable
0 : Disable the RBR interrupt (default).
1 : Enable the RBR interrupt.