SB16C1058_Data Sheet_EN

SB16C1058
OCTAL UART WITH 256-BYTE FIFO
JULY 2013 REV 1.04
10
Table 2: Pin Description…continued
Name
Pin
Type
Description
TXRDY0#_TXEN0
TXRDY1#_TXEN1
TXRDY2#_TXEN2
TXRDY3#_TXEN3
TXRDY4#_TXEN4
TXRDY5#_TXEN5
TXRDY6#_TXEN6
TXRDY7#_TXEN7
72
84
100
110
122
4
16
26
O
O
O
O
O
O
O
O
Transmitter Ready/Tx Enable. These pins provide individual channel
transmitter ready or transmit enable. TXRDY0-7# are enabled when
ATR[1:0] is cleared to ‘00’ (default state). If ATR[1:0] are set to ‘11’,
TXRDY0-7# operate as TXEN0-7. TXRDY0-7# (active low) are asserted
by TX FIFO/THR status for transmit channels 0-7. TXEN0-7’s asserted
state is determined by ATR[5:4]. If ATR[4] is cleared to ‘0’, the state holds
the same value as ATR[5]. If ATR[4] is set to ‘1’, it is the auto-toggling
state based on ATR[5]. If these pins are unused, leave them open.
RXRDY0#_RXEN0
RXRDY1#_RXEN1
RXRDY2#_RXEN2
RXRDY3#_RXEN3
RXRDY4#_RXEN4
RXRDY5#_RXEN5
RXRDY6#_RXEN6
RXRDY7#_RXEN7
75
85
101
111
123
5
17
27
O
O
O
O
O
O
O
O
Receiver Ready/Rx Enable. These pins provide individual channel
receiver ready or receive enable. RXRDY0-7# are enabled when ATR[1:0]
is cleared to ‘00’ (default state). If ATR[1:0] is set to ‘11’, RXRDY0-7# are
changed to RXEN0-7. RXRDY0-7# (active low) are asserted by RX
FIFO/RBR status for receive channels 0-7. RXEN0-7’s asserted state is
determined by ATR[7:6]. If ATR[6] is cleared to ‘0’, the state holds the
same value as ATR[7]. If ATR[6] is set to ‘1’, it is the auto-toggling state
based on ATR[7]. If these pins are unused, leave them open.
Modem and Serial I/O Interface
Name
Pin
Type
Description
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
67
79
89
105
115
127
11
21
O
O
O
O
O
O
O
O
Transmit Data. These pins are individual transmit data output. During the
local loop-back mode, the TXD output pin is disabled and TXD data is
internally connected to the RXD input.
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXD7
78
88
104
114
126
8
20
30
I
I
I
I
I
I
I
I
Receive Data. These pins are individual receive data input. During the
local loop-back mode, the RXD input pin is disabled and RXD data is
internally connected to the TXD output.
RTS0#
RTS1#
RTS2#
RTS3#
RTS4#
RTS5#
RTS6#
RTS7#
68
80
90
106
118
128
12
22
O
O
O
O
O
O
O
O
Request to Send (active low). These pins indicate that the UART is ready
to send data to the modem, and affect transmit and receive operations
only when Auto-RTS function is enabled.