SB16C1058_Data Sheet_EN

SB16C1058
OCTAL UART WITH 256-BYTE FIFO
JULY 2013 REV 1.04
2
CONTENTS
1. Description ............................................................................................................................................... 5
2. Features .................................................................................................................................................... 5
3. Ordering Information ............................................................................................................................... 6
4. Block Diagram.......................................................................................................................................... 7
5. Pin Configuration .................................................................................................................................... 8
5.1 Pin Configuration for 128-Pin TQFP (20x20) Package ................................................................ 8
5.2 Pin Description ............................................................................................................................... 9
Modem and Serial I/O Interface .................................................................................................... 10
Multiport I/O Interfaces .................................................................................................................. 12
Multiport I/O Interfaces .................................................................................................................. 13
Other Interfaces ............................................................................................................................ 13
6. Functional Description .......................................................................................................................... 14
6.1 Normal mode and MIO mode....................................................................................................... 14
6.2 MIO mode ...................................................................................................................................... 15
6.3 FIFO Operation ............................................................................................................................. 17
6.4 Hardware Flow Control ................................................................................................................ 17
6.4.1 Auto-RTS .............................................................................................................................. 17
6.4.2 Auto-CTS .............................................................................................................................. 18
6.5 Software Flow Control ................................................................................................................. 19
6.5.1 Transmit Software Flow Control ........................................................................................... 20
6.5.2 Receive Software Flow Control ............................................................................................ 20
6.5.3 Xon Any Function ................................................................................................................. 23
6.5.4 Xoff Re-transmit Function .................................................................................................... 23
6.6 Interrupts ....................................................................................................................................... 24
6.7 DMA Operation ............................................................................................................................. 25
6.7.1 Single DMA transfer (DMA Mode 0/FIFO Disable) .............................................................. 25
6.7.2 Block DMA transfer (DMA Mode 1) ...................................................................................... 26
6.8 Sleep Mode with Auto Wake-Up .................................................................................................. 26
6.9 Programmable Baud Rate Generator ......................................................................................... 27
6.9 Break and Time-out Conditions .................................................................................................. 29
7. UART Register Descriptions ................................................................................................................ 30
7.1 Transmit Holding Register (THR, Page 0) .................................................................................. 34