SB16C1058_Data Sheet_EN

SB16C1058
OCTAL UART WITH 256-BYTE FIFO
JULY 2013 REV 1.04
42
7.12 Global Interrupt Control Register (GICR, Page 2)
GICR is a register that internal eight 16C1050 UARTs share to use. It is used when
determining whether each interrupt generated at eight 16C1050 UARTs are transmitted to
global interrupts or not. Table 17 shows the GICR bit settings.
Table 17: Global Interrupt Control Register Description
Bit
Symbol
Description
7
GICR[7]
Interrupt Mask for 8
th
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[7] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[7] is ‘1’.
6
GICR[6]
Interrupt Mask for 7
th
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[6] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[6] is ‘1’.
5
GICR[5]
Interrupt Mask for 6
th
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[5] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[5] is ‘1’.
4
GICR[4]
Interrupt Mask for 5
th
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[4] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[4] is ‘1’.
3
GICR[3]
Interrupt Mask for 4
th
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[3] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[3] is ‘1’.
2
GICR[2]
Interrupt Mask for 3
rd
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[2] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[2] is ‘1’.
1
GICR[1]
Interrupt Mask for 2
nd
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[1] is ‘1’.
1 : Interrupt Non-masking. Global interrupt is generated
when the value of GISR[1] is ‘1’.
0
GICR[0]
Interrupt Mask for 1
st
UART channel
0 : Interrupt Masking. Global interrupt is not generated
even when the value of GISR[0] is ‘1’.