SB16C1058_Data Sheet_EN

SB16C1058
OCTAL UART WITH 256-BYTE FIFO
JULY 2013 REV 1.04
46
7.18 Auto Toggle Control Register (ATR, Page 3)
ATR controls the signals for controlling input/output signals when using Line Interface as
RS422 or RS485, so eliminates additional glue logic outside. Table 21 shows ATR bit
settings.
Table 21: Auto Toggle Control Register Description
Bit
Symbol
Description
7
ATR[7]
RXEN Polarity Select.
0 : Asserted output of RXEN is ‘0’.
1 : Asserted output of RXEN is ‘1’. (default)
6
ATR[6]
RXEN Control Mode Select.
Only when ATR[1:0] is ‘11’;
0 : RXEN is outputted as same as ATR[7], irrespective of TXD
signal. (default)
1 : RXEN is outputted as same as ATR[7] when TXD signal is not
transmitting. And outputted as complement of ATR[7] when
TXD signal is transmitting.
5
ATR[5]
TXEN Polarity Select.
0 : Asserted output of TXEN is ‘0’. (default)
1 : Asserted output of TXEN is ‘1’.
4
ATR[4]
TXEN Control Mode Select.
0 : TXEN is outputted as same as ATR[5], irrespective of TXD
signal. (default)
1 : TXEN is outputted as complement of ATR[5] when TXD signal
is not transmitting, and outputted as same as ATR[5] when
TXD signal is transmitting..
3:2
ATR[3:2]
Not used, always ‘00’.
1:0
ATR[1:0]
Auto Toggle Enable.
00 : Auto toggle is disabled (default).
RTS#, DTR# pin operate as RTS#, DTR#. And each of
TXRDY#_TXEN, RXRDY#_RXEN operates as TXRDY#,
RXRDY#.
01 : RTS# pin operates as TXEN. DTR# pin operates as DTR#.
And each of TXRDY#_TXEN, RXRDY#_RXEN operates as
TXRDY#, RXRDY#.
10 : DTR# pin operates as TXEN. RTS# operates as RTS#. And
each of TXRDY#_TXEN, RXRDY#_RXEN operates as
TXRDY#, RXRDY#.
11 : TXRDY#_TXEN, RXRDY#_RXEN pin operates as TXEN,
RXEN. RTS#_TXEN, DTR#_TXEN operates as RTS#, DTR#.
Cf. After reset, TXEN and RXEN# output ‘0b’.