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SB16C1058_Data Sheet_EN

ManualsBrandsSystemBase ManualsElectronic ComponentsOctal UART with 256 Byte TX/RX FIFO, 80-pin TQFP - 60pcs Bundle
51525354555657585960
SB16C1058
OCTAL UART WITH 256-BYTE FIFO
JULY 2013 REV 1.04
54
8.5 Interrupt Poll Register
In Normal Mode, UART’s internal registers can be accessed through CS# and UART’s
GISR (Global Interrupt Status Register) is used for checking 8 UART channel’s interrupt
status. GISR is the same register as IPR in this case.
IPR access Option Register through OPT# control signal in MIO mode and GISR access
UART internal Register through CS# or nUART signal. GISR and IMR are same region
and SB16C1058 provides different methods of accessing them.
Table 30: Interrupt Poll Register
Bit
Name
Descriptions
7
P7
1h: Interrupt not occurred in Port8.
0h : Interrupt occurred in Port8.
6
P6
1h: Interrupt not occurred in Port7.
0h : Interrupt occurred in Port7.
5
P5
1h: Interrupt not occurred in Port6.
0h : Interrupt occurred in Port6.
4
P4
1h: Interrupt not occurred in Port5.
0h : Interrupt occurred in Port5.
3
P3
1h: Interrupt not occurred in Port4.
0h : Interrupt occurred in Port4.
2
P2
1h: Interrupt not occurred in Port3.
0h : Interrupt occurred in Port3.
1
P1
1h: Interrupt not occurred in Port2.
0h : Interrupt occurred in Port2.
0
P0
1h: Interrupt not occurred in Port1.
0h : Interrupt occurred in Port1.