Technical Manual

6-12
SPI Bus Interface
This bus is a synchronous serial bus made up of a data line, a clock line,
and an individual IC unique select line. It's primary purpose is to
configure the operating state of each IC. ICs programmed by this
include: display module, ADSIC, fractional-N synthesizer, pendulum
reference oscillator, DAIC and, if equipped, the secure module.
The MCU (U701) is configured as the master of the bus. It provides the
synchronous clock (SPI_SCK), a select line, and data (MOSI [Master
Out Slave In]). In general, the appropriate select line is pulled low to
enable the target IC, and the data is clocked in. Actually, the SPI bus is
a duplex bus with the return data being clocked in on MISO (master in
slave out). The only place this is used is when communicating with the
secure module. In this case, the return data is clocked back to the MCU
on MISO (master in slave out).
Universal Connector
and Option Selects
The universal connector is located on the side of the radio. It is the
external port or interface to the outside, and is used for programming
and interfacing to external accessories. The signals are shown in Figure
12. The universal connector connects to the controller board at J101
through a flex circuit, routed inside the external housing. Connections
to the universal connector and J101 on the controller board are shown
in Figures 12 and 13.
OPT_SEL1
EXT_MIC
OPT_SEL2
RTSBIN*
SB9600_BUSY
RS232_DOUT/BOOT_DIN
EXT_SPKR
12
13
1
2
OPTB+/BOOT_SEL/VPP
SPKR_COM
GND
CTSOUT*
RS232_DIN
LHDATA/BOOT_DOUT/KEYFAIL*
MAEPF-26004-O
Figure 12 Universal (Side) Connector
135
37
39
41
36
38
40
2
4
6
J101
OPT_SEL_1
EXT_SPKR
EXT_MIC
OPT_B+/BOOT_SEL/VPP
OPT_SEL_2
SPKR_COM
RTSIN*
GND
SB9600_BUSY
CTSOUT*
RS232_DOUT/BOOT_DIN
LH_DATA/BOOT_DOUT/KEYFAIL*
RS232_DIN
11
9
13
12
7
5
10
3
8
1
6
2
4
Signal Name J101-Pin #
MAEPF-26005-O
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Figure 13 Controller Connector —- J101