User Manual

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CL5ADAH2Z
Confidential
2020.11.05 rev.1.1
6.2.1. Open data interface –host to module
When host wants to send data to module, host should open data interface.
The timing chart is as follows. (See Figure19)
Figure19 open data interface - host to module
First, data interface state is not open.
UART0_RX and UART0_TX are always high.
(1) Host wants to send data to module. Host sets PMU_WAKEUP to high (PMU_WAKEUP = high)
(2) Module is awaking (might also be waking) and module is preparing
(3) Module sets SC_SWP to high (SC_SWP = high)
The data interface is opened and communication can start