Integration Manual
Table Of Contents
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in 2G connected mode
- 1.5.1.3 VCC current consumption in 3G connected mode
- 1.5.1.4 VCC current consumption in LTE connected mode
- 1.5.1.5 VCC current consumption in cyclic low power idle mode / active mode
- 1.5.1.6 VCC current consumption in fixed active mode
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interfaces
- 1.9 Data communication interfaces
- 1.10 eMMC interface
- 1.11 Digital Audio interfaces
- 1.12 ADC interfaces
- 1.13 General Purpose Input/Output
- 1.14 Reserved pins (RSVD)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Jamming detection
- 1.15.3 IP modes of operation
- 1.15.4 Dual stack IPv4 and IPv6
- 1.15.5 Embedded TCP/IP and UDP/IP
- 1.15.6 Embedded FTP and FTPS
- 1.15.7 Embedded HTTP and HTTPS
- 1.15.8 SSL and TLS
- 1.15.9 Firmware update Over AT (FOAT)
- 1.15.10 Firmware update Over The Air (FOTA)
- 1.15.11 Power Saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for the external battery charging circuit
- 2.2.1.8 Guidelines for external charging and power path management circuit
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interfaces
- 2.6 Data communication interfaces
- 2.7 eMMC interface
- 2.8 Digital Audio interface
- 2.9 ADC interfaces
- 2.10 General Purpose Input/Output
- 2.11 Reserved pins (RSVD)
- 2.12 Module placement
- 2.13 Module footprint and paste mask
- 2.14 Thermal guidelines
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- 6 FCC Notes
- Appendix
- Glossary
- Related documents
- Revision history
- Contact
TOBY-L3 series - System Integration Manual
TSD-19090601 - R13 System Integration Manual Page 44 of 143
The USB High-Speed 2.0 compliant interface consists of the following pins:
USB_D+/USB_D–, USB High-Speed differential data lines as per USB 2.0 specification [4]
VUSB_DET input pin, which senses the VBUS rail presence (nominally 5 V at the source) to detect the
host connection and enable the USB 2.0 interface with the module acting as a USB device.
Neither the USB interface, nor the whole module is supplied by the VUSB_DET input pin, which senses
the VBUS USB supply voltage presence and absorbs few microamperes.
USB_ID pin, available for USB ID resistance measurement:
o if the USB_ID pin is externally connected to GND, then the module acts as a USB host
o if the USB_ID pin is externally left unconnected (floating), then the module acts as a USB device
The USB High-Speed 2.0 compliant interface, with the module acting as a USB device, provides:
ADB interface
6
(Linux console for open CPU applications development and debug)
Modem interface (Dialing up the Network with PPP protocol or Sending AT commands)
AT interface (Sending AT commands)
GNSS interface (Transport GNSS NMEA data information)
NDIS network interface over USB (Ethernet over USB data connection)
FW upgrades by means of the +UDWNFILE and +UFWINSTALL AT commands
FW upgrades by means of the Download Tool
The module, acting as a USB device, identifies itself by its VID (Vendor ID) and PID (Product ID) combination,
included in the USB device descriptor according to the USB 2.0 specifications [4].
The USB High-Speed 2.0 compliant interface, with the module acting as USB host (OTG), provides:
Communication with external device by means of the open CPU application
1.9.2 UART interfaces
1.9.2.1 UART0 interface
The UART0 Universal Asynchronous Receiver/Transmitter serial interface has CMOS compatible signal levels
(0 V for ON / active state and 1.8 V for OFF / idle state), providing:
Can be configured as SPI (SPI1) interface by open CPU API or AT commands alternatively.
Communication with external devices by means of the open CPU API, over the following pins:
o RXD module output and TXD module input data lines
o CTS module output and RTS module input hardware flow control lines
Trace logging (diagnostic purpose), over the following pins:
o RXD module output and TXD module input data lines
6
Not supported by "0x" product feature versions