Integration Manual
Table Of Contents
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in 2G connected mode
- 1.5.1.3 VCC current consumption in 3G connected mode
- 1.5.1.4 VCC current consumption in LTE connected mode
- 1.5.1.5 VCC current consumption in cyclic low power idle mode / active mode
- 1.5.1.6 VCC current consumption in fixed active mode
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interfaces
- 1.9 Data communication interfaces
- 1.10 eMMC interface
- 1.11 Digital Audio interfaces
- 1.12 ADC interfaces
- 1.13 General Purpose Input/Output
- 1.14 Reserved pins (RSVD)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Jamming detection
- 1.15.3 IP modes of operation
- 1.15.4 Dual stack IPv4 and IPv6
- 1.15.5 Embedded TCP/IP and UDP/IP
- 1.15.6 Embedded FTP and FTPS
- 1.15.7 Embedded HTTP and HTTPS
- 1.15.8 SSL and TLS
- 1.15.9 Firmware update Over AT (FOAT)
- 1.15.10 Firmware update Over The Air (FOTA)
- 1.15.11 Power Saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for the external battery charging circuit
- 2.2.1.8 Guidelines for external charging and power path management circuit
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interfaces
- 2.6 Data communication interfaces
- 2.7 eMMC interface
- 2.8 Digital Audio interface
- 2.9 ADC interfaces
- 2.10 General Purpose Input/Output
- 2.11 Reserved pins (RSVD)
- 2.12 Module placement
- 2.13 Module footprint and paste mask
- 2.14 Thermal guidelines
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- 6 FCC Notes
- Appendix
- Glossary
- Related documents
- Revision history
- Contact
TOBY-L3 series - System Integration Manual
TSD-19090601 - R13 System Integration Manual Page 74 of 143
Reference
Description
Part Number - Manufacturer
R1
47 k Resistor 0402 5% 0.1 W
RC0402JR-0747KL - Yageo Phycomp
R2
10 k Resistor 0402 5% 0.1 W
RC0402JR-0710KL - Yageo Phycomp
R3
100 k Resistor 0402 5% 0.1 W
RC0402JR-07100KL - Yageo Phycomp
T1
P-Channel MOSFET Low On-Resistance
AO3415 - Alpha & Omega Semiconductor Inc.
T2
NPN BJT Transistor
BC847 - Infineon
C1
330 µF Capacitor Tantalum D_SIZE 6.3 V 45 m
T520D337M006ATE045 - KEMET
C2
10 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R71C103KA01 - Murata
C3
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
C4
56 pF Capacitor Ceramic C0G 0402 5% 25 V
GRM1555C1E560JA01 - Murata
C5
15 pF Capacitor Ceramic C0G 0402 5% 25 V
GRM1555C1E150JA01 - Murata
Table 23: Components for VCC supply removal application circuit
☞ It is highly recommended to avoid an abrupt removal of the VCC supply during the TOBY-L3 series
module’s normal operations: the power off procedure must be started as described in section 1.6.2, and
then a suitable VCC supply must be held at least until the end of the modules’ internal power off
sequence, which occurs when the generic digital interfaces supply output (V_INT) is switched off by the
module.
2.2.1.10 Guidelines for VCC supply layout design
A clean connection of the module VCC pins with a DC supply source is required for correct RF performance.
Guidelines are summarized in the following list:
All the available VCC pins must be connected to the DC source.
VCC connection must be as wide as possible and as short as possible.
Any series component with Equivalent Series Resistance (ESR) greater than few milliohms must be
avoided.
VCC connection must be routed through a PCB area separated from RF lines / parts, sensitive analog
signals and sensitive functional units: it is good practice to interpose at least one layer of PCB ground
between the VCC track and other signal routing.
Coupling between VCC and digital lines, especially USB, must be avoided.
The tank bypass capacitor with low ESR for current spikes smoothing described in section 2.2.1.6 should
be placed close to the VCC pins. If the main DC source is a switching DC-DC converter, place the large
capacitor close to the DC-DC output and minimize the VCC track length. Otherwise consider using
separate capacitors for the DC-DC converter and module tank capacitor.
The bypass capacitors in the pF range illustrated in Figure 24 and Table 20 should be placed as close as
possible to the VCC pins, where the VCC line narrows close to the module input pins, improving the RF