Integration Manual

TOBY-L3 series - System Integration Manual
TSD-19090601 - R13 System Integration Manual Page 82 of 143
Correct transition between ANT1 / ANT2 pads and application board must be provided, implementing the
following design-in guidelines for the application PCB layout close to the ANT1 / ANT2 pads:
 On a multilayer board, the whole layer stack below the RF connection should be free of digital lines.
 Increase GND keep-out (i.e. clearance, a void area) around the ANT1 / ANT2 pads, on the top layer of
the application PCB, to at least 250 µm up to the adjacent pads metal definition and up to 400 µm on
the area below the module, to reduce parasitic capacitance to ground, as shown in the left example of
Figure 31.
 Add GND keep-out (i.e. clearance, a void area) on the buried metal layer below the ANT1 / ANT2 pads
if the top-layer to buried layer dielectric thickness is below 200 µm, to reduce parasitic capacitance to
ground, as shown in the right example of Figure 31.
Min.
250 um
Min. 400 um
GND
ANT1
GND clearance
on very close buried layer
below ANT1 pad
GND clearance
on top layer
around ANT1 pad
Min.
250 um
Min. 400 um
GND
ANT2
GND clearance
on very close buried layer
below ANT2 pad
GND clearance
on top layer
around ANT2 pad
Figure 31: GND keep-out area on top layer around ANT1 / ANT2 pads and on very close buried layer below ANT1 / ANT2 pads
Guidelines for RF transmission line design
Any RF transmission line, such as the ones from the ANT1 and ANT2 pads up to the related antenna
connector or up to the related internal antenna pad, must be designed so that the characteristic impedance
is as close as possible to 50 .
RF transmission lines can be designed as a micro strip (consists of a conducting strip separated from a
ground plane by a dielectric material) or a strip line (consists of a flat strip of metal which is sandwiched
between two parallel ground planes within a dielectric material). The micro strip, implemented as a coplanar
waveguide, is the most common configuration for printed circuit boards.
Figure 32 and Figure 33 provide two examples of suitable 50  coplanar waveguide designs. The first
example of an RF transmission line can be implemented for a 4-layer PCB stack-up herein illustrated, and
the second example of an RF transmission line can be implemented for a 2-layer PCB stack-up herein
illustrated.