Integration Manual
Table Of Contents
- Contents
- 1 System description
- 1.1 Overview
- 1.2 Architecture
- 1.3 Pin-out
- 1.4 Operating modes
- 1.5 Supply interfaces
- 1.5.1 Module supply input (VCC)
- 1.5.1.1 VCC supply requirements
- 1.5.1.2 VCC current consumption in 2G connected mode
- 1.5.1.3 VCC current consumption in 3G connected mode
- 1.5.1.4 VCC current consumption in LTE connected mode
- 1.5.1.5 VCC current consumption in cyclic low power idle mode / active mode
- 1.5.1.6 VCC current consumption in fixed active mode
- 1.5.2 Generic digital interfaces supply output (V_INT)
- 1.5.1 Module supply input (VCC)
- 1.6 System function interfaces
- 1.7 Antenna interfaces
- 1.8 SIM interfaces
- 1.9 Data communication interfaces
- 1.10 eMMC interface
- 1.11 Digital Audio interfaces
- 1.12 ADC interfaces
- 1.13 General Purpose Input/Output
- 1.14 Reserved pins (RSVD)
- 1.15 System features
- 1.15.1 Network indication
- 1.15.2 Jamming detection
- 1.15.3 IP modes of operation
- 1.15.4 Dual stack IPv4 and IPv6
- 1.15.5 Embedded TCP/IP and UDP/IP
- 1.15.6 Embedded FTP and FTPS
- 1.15.7 Embedded HTTP and HTTPS
- 1.15.8 SSL and TLS
- 1.15.9 Firmware update Over AT (FOAT)
- 1.15.10 Firmware update Over The Air (FOTA)
- 1.15.11 Power Saving
- 2 Design-in
- 2.1 Overview
- 2.2 Supply interfaces
- 2.2.1 Module supply (VCC)
- 2.2.1.1 General guidelines for VCC supply circuit selection and design
- 2.2.1.2 Guidelines for VCC supply circuit design using a switching regulator
- 2.2.1.3 Guidelines for VCC supply circuit design using a LDO linear regulator
- 2.2.1.4 Guidelines for VCC supply circuit design using a rechargeable battery
- 2.2.1.5 Guidelines for VCC supply circuit design using a primary battery
- 2.2.1.6 Additional guidelines for VCC supply circuit design
- 2.2.1.7 Guidelines for the external battery charging circuit
- 2.2.1.8 Guidelines for external charging and power path management circuit
- 2.2.1.9 Guidelines for removing VCC supply
- 2.2.1.10 Guidelines for VCC supply layout design
- 2.2.1.11 Guidelines for grounding layout design
- 2.2.2 Generic digital interfaces supply output (V_INT)
- 2.2.1 Module supply (VCC)
- 2.3 System functions interfaces
- 2.4 Antenna interface
- 2.5 SIM interfaces
- 2.6 Data communication interfaces
- 2.7 eMMC interface
- 2.8 Digital Audio interface
- 2.9 ADC interfaces
- 2.10 General Purpose Input/Output
- 2.11 Reserved pins (RSVD)
- 2.12 Module placement
- 2.13 Module footprint and paste mask
- 2.14 Thermal guidelines
- 2.15 Design-in checklist
- 3 Handling and soldering
- 4 Approvals
- 5 Product testing
- 6 FCC Notes
- Appendix
- Glossary
- Related documents
- Revision history
- Contact
TOBY-L3 series - System Integration Manual
TSD-19090601 - R13 System Integration Manual Page 96 of 143
2.6 Data communication interfaces
2.6.1 USB interface
2.6.1.1 Guidelines for USB circuit design
USB 2.0 interface, with the module acting as USB device, as shown in Figure 39 and Table 33
USB 2.0 interface, with the module acting as USB host, as shown in Figure 40 and Table 34
USB pull-up or pull-down resistors and external series resistors on the USB_D+ and USB_D– lines as required
by the USB 2.0 specification [4] are part of the module USB pins driver and do not need to be externally
provided.
Routing the USB pins to a connector, they will be externally accessible on the application device. According
to the EMC/ESD requirements of the application, an additional ESD protection device with very low
capacitance should be provided close to the accessible point on the line connected to this pin.
☞ ESD sensitivity rating of USB interface pins is 1 kV (HBM according to the JESD22-A114F). A higher
protection level could be required if the lines are externally accessible and it can be achieved by
mounting a very low capacitance (i.e. less or equal to 1 pF) ESD protection (e.g. Tyco Electronics
PESD0402-140) on the lines connected to these pins, close to the accessible points.
The USB pins of the modules can be directly connected to the USB host processor without additional ESD
protections if they are not externally accessible or according to EMC/ESD requirements.
☞ If the USB interface pins are not used, they must be all left unconnected on the application board.
D+
D–
GND
28
USB_D+
27
USB_D–
GND
USB 2.0 DEVICE
CONNECTOR
VBUS
D+
D–
GND
USB 2.0 HOST
PROCESSOR
TOBY-L3series
VBUS
4
VUSB_DET
D1 D2 D3
C1
C1
28
USB_D+
27
USB_D–
GND
TOBY-L3 series
4
VUSB_DET
168
USB_ID
168
USB_ID
Figure 39: USB 2.0 interface application circuits, with TOBY-L3 series module acting as a USB device
Reference
Description
Part Number - Manufacturer
C1
100 nF Capacitor Ceramic X7R 0402 10% 16 V
GRM155R61A104KA01 - Murata
D1, D2, D3
Very Low Capacitance ESD Protection
PESD0402-140 - Tyco Electronics
Table 33: Component for USB 2.0 interface application circuits, with TOBY-L3 series module acting as a USB device