Integration Manual

TSD-19090601 - R15 Contents Page 11 of 143
1.2 Architecture
RF section
The RF section is composed of an RF transceiver, PAs, crystal oscillator, filters, duplexers and RF switches.
The Tx signal is pre-amplified by the RF transceiver, then output to the primary antenna input/output port
(ANT1) of the module via power amplifier (PA), SAW band pass filters band, specific duplexer and antenna
switch.
Dual receiving paths are implemented according to MIMO, and Receiver Diversity radio technologies
supported by the modules as LTE category 4 and HSDPA category 24 User Equipment: incoming signals
are received through the primary (ANT1) and the secondary (ANT2) antenna input ports which are
connected to the RF transceiver via specific antenna switch, diplexer, duplexer, SAW band pass filters.
 RF transceiver performs modulation, up-conversion of the baseband I/O signals for Tx, down-conversion
and demodulation of the dual RF signals for Rx. The RF transceiver contains:
Single chain high linearity receivers with integrated LNAs for multi-mode operation,
Highly linear RF demodulator / modulator capable GMSK, 8-PSK, QPSK, 16-QAM, 64-QAM
RF synthesizer,
VCO.
 Power Amplifiers (PA) amplify the Tx signal modulated by the RF transceiver
 RF switches connect the primary (ANT1) and secondary (ANT2) antenna ports to the suitable Tx / Rx
path
 SAW duplexers and band pass filters separate the Tx and Rx signal paths and provide RF filtering
 19.2 MHz temperature-controlled crystal oscillator (TCXO) generates the clock reference in active mode
or connected mode.
Baseband and power management section
The Baseband and Power Management section is composed of the following main elements:
 A mixed signal ASIC, which integrates
o Microprocessor for control functions
o DSP core for cellular Layer 1 and digital processing of Rx and Tx signal paths
o Memory interface controller
o Dedicated peripheral blocks for control of the USB, SIM and generic digital interfaces
o Interfaces to the RF transceiver ASIC
 Memory system, which includes NAND flash and LPDDR2 RAM
 Voltage regulators to derive all the subsystem supply voltages from the module supply input VCC
 Voltage sources for external use: V_INT, V_SIM, V_ETH, V_MMC
 Hardware power on
 Hardware reset