Integration Manual

TSD-19090601 - R15 Contents Page 14 of 143
Function
Pin Name
Pin No
I/O
Description
Remarks
USB_D+
28
I/O
USB High-Speed 2.0
diff. transceiver (+)
90  nominal differential impedance (Z
0
).
30  nominal common mode impedance (Z
CM
).
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specs [4] are part of the USB pin
driver and need not be provided externally.
Test-Point for diagnostic / FW update access is
recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
USB_ID
168
I
USB device
identification
Pin for ID resistance measurement.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
UART0
RXD
17
O /
O
UART0 data output /
SPI1 Master Output
Slave Input
1.8 V output, Circuit 104 (RXD) in ITU-T V.24.
Alternatively configurable as SPI1 Master Output Slave Input.
Test-Point for diagnostic access recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
TXD
16
I /
I
UART0 data input /
SPI1 Master Input Slave
Output
1.8 V input, Circuit 103 (TXD) in ITU-T V.24.
Alternatively configurable as SPI1 Master Input Slave Out.
Internal active pull-up to V_INT.
Test-Point for diagnostic access recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
CTS
15
O /
O
UART0 clear to send
output /
SPI1 Shift Clock
1.8 V output, Circuit 106 (CTS) in ITU-T V.24.
Alternatively configurable as SPI1 Shift Clock.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
RTS
14
I /
O
UART0 ready to send
input /
SPI1 Chip Select
1.8 V input, Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
Alternatively configurable as SPI1 Chip Select.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
RI
11
O /
I/O
/
I
UART0 ring indicator /
GPIO /
External Interrupt
1.8 V output, Circuit 125 (RI) in ITU-T V.24.
Configurable as GPIO or External Interrupt.
See sections 1.9.2 for functional description.
See sections 2.6.2 for external circuit design-in.
UART1
RXD1
160
O /
O /
O /
O
UART1 data output /
SPI2 MOSI /
I2S1 Word Alignment /
PCM1 Frame Sync
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
alternatively configurable as SPI2 MOSI, I2S1 Word
Alignment or PCM1 Frame Sync by open CPU API or AT
command.
See section 1.9.2 for functional description.
See section 2.6.2 / 2.6.3 for external circuit design-in.