Integration Manual

TSD-19090601 - R15 Contents Page 74 of 143
 Pull-up SIM detection signal (see section 2.5 for more details)
 Supply voltage translators to connect 1.8 V module generic digital interfaces to 3.0 V devices (e.g. see
section 2.6.1 for more details)
 Pull-up DDC (I
2
C) interface signals (see section 2.6.4 for more details)
 Supply a 1.8 V u-blox GNSS device (see section 2.6.4 for more details)
 Enable external voltage regulators providing supply for external devices, as linear LDO regulators
providing the 3.3 V / 1.8 V supply rails for a u-blox EMMY-W1 series module (see section 2.6.5 for more
details)
 Supply an external device as an external 1.8 V audio codec (see section 2.8 for more details)
The V_INT supply output pin provides internal short circuit protection to limit the start-up current and
protect the device in short circuit situations. No additional external short circuit protection is required.
☞ Do not apply loads which might exceed the limit for the maximum available current from V_INT supply
(see TOBY-L3 series Data Sheet [1]) as this can cause malfunctions in the internal circuitry.
☞ Since the V_INT supply is generated by an internal switching step-down regulator (the V_INT voltage
ripple can range as specified in the TOBY-L3 series Data Sheet [1]), it is not recommended to supply
sensitive analog circuitry without adequate filtering for digital noise.
☞ V_INT can only be used as an output: do not connect any external supply source on V_INT.
☞ The ESD sensitivity rating of the V_INT supply pin is 1 kV (Human Body Model according to JESD22-
A114). A higher protection level could be required if the line is externally accessible and it can be
achieved by mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to the
accessible point.
☞ It is recommended to monitor the V_INT pin to sense the end of the internal switch-off sequence of
TOBY-L3 series modules: the VCC supply can be removed only after V_INT goes low
☞ It is recommended to provide direct access to the V_INT pin on the application board by means of an
accessible test point directly connected to the V_INT pin, for diagnostic purposes.