User manual

RS232-ADC16/24
Since firmware version 1.11 provides ADC output rates that scale with SYSCLK
one might consider the influence of SYSCLK on output rate and precision.
REG_ADC_DEC = 11
SYSCLK
MHz
I in mA f
output
Hz
Min
mV
Max
mV
Noise
mV
Noise
%
Bit
3 10.5 4 -0.04 0.03 0.07 0.0028 15.12
6.1 13.0 7.5 -0.04 0.07 0.11 0.0044 14.47
12.2 17.7 15 -0.04 0.04 0.08 0.0032 14.93
24.5 24.8 29 -0.08 0.04 0.12 0.0048 14.35
49 37.6 29 -0.07 0.08 0.15 0.0060 14.02
REG_ADC_DEC = 5
SYSCLK
MHz
I in mA f
output
Hz
Min
mV
Max
mV
Noise
mV
Noise
%
Bit
3 10.0 76 -4.85 4.84 9.69 0.3876 8.01
6.1 12.1 148 -5.23 4.84 10.07 0.4028 7.96
12.2 15.2 218 -4.81 4.65 9.46 0.3784 8.05
24.5 19.0 231 -4.69 5.38 10.07 0.4028 7.96
49 27.2 261 -4.70 5.53 10.23 0.4092 7.93
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