User manual

gpio.Relais

Drawing 2: RS485 bus on USB with additional power supply

Individual parts of a bus constructed as shown in drawing 2 can be supplied at

arbitrary points by an isolated power supply. Mind to really seperate VBUS of

these groups. The example demonstrates this by means of the first card

connected to the host PC via USB and the rest of the bus being supplied by a

seperate power source. Opened jumper J7 disrupts the VBUS connection on

DSUB's PIN9.

The common set of registers simplifies working with different gpio.NET

modules. Device identification, configuration of interfaces and general behaviour

remain consitent throughout the family.

The gpio.Net Core Interface defines four sections in Holding Register's address

space.

Section 0x0000-0x00FF contains general configuration registers –

called Core-Register. Registers that are gpio.Relais specific occupy the

Application-Register section 0x0100-0x0FFF which is followed by the EEPROM.

Registers 0x1000-0x107F serve as persistent configuration used at start-up.

This group collects default values of Core- and Application-Registers. Section

0x2000-0x237F is non-volatile memory available for the user.

EEPROM sections 0x1000-0x107F and 0x2000-0x237F can be protected against

unaware writes separately.

All registers are – as common by Modbus – 16bit wide.

5 The Modbus protocol distinguishes four address ranges – Input registers, Holding registers,

Inputs und Coils. Inputs and Coils offer bitwise access to ressources. While Holding registers

and Coils are read/writeable, the other two are read-only. Each type uses a 16bit address

space that can overlap each other.

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