User manual

Hardware Description

A slave device is selected when the master asserts its NSS signal. If multiple slave devices

exist, the master generates a separate slave select signal for each slave (NPCS). The SPI

system consists of two data lines and two control lines:

• Master Out Slave In (MOSI): This data line supplies the output data from the master

shifted into the input(s) of the slave(s).

• Master In Slave Out (MISO): This data line supplies the output data from a slave to the

input of the master. There may be no more than one slave transmitting data during any

particular transfer.

• Serial Clock (SPCK): This control line is driven by the master and regulates the flow of

the data bits. The master may transmit data at a variety of baud rates; the SPCK line

cycles once for each bit that is transmitted. The SPI baudrate is Master Clock (MCK)

divided by a value between 1 and 255

• Slave Select (NSS): This control line allows slaves to be turned on and off by hardware.

Each SPI Controller has a dedicated receive and transmit DMA channel.

5.29. Synchronous Serial Controller (SSC)

The StampA5D3x has two SSC interfaces available, depending on the multiplexing of the

pins.

The SSC supports many serial synchronous communication protocols generally used in

audio and telecom applications such as I2S, Short Frame Sync, Long Frame Sync, etc.

The SSC has separated receive and transmit channels. Each channel has a data, a clock

and a frame synchronization signal (RD, RK, RF, resp. TD, TK, TF). Both a receive and a

transmit DMA channel are assigned to each SSC.

5.30. Image Sensor Interface (ISI)

The Image Sensor Interface (ISI) supports direct connection to the ITU-R BT. 601/656 8-

bit mode compliant sensors and up to 12-bit grayscale sensors. It receives the image data

stream from the image sensor on the 12-bit data bus. This module receives up to 12 bits

for data, the horizontal and vertical synchronizations and the pixel clock. The reduced pin

count alternative for synchronization is supported for sensors that embed SAV (start of

active video) and EAV (end of active video) delimiters in the data stream.

The Image Sensor Interface interrupt line is generally connected to the Advanced

Interrupt Controller and can trigger an interrupt at the beginning of each frame and at

the end of a DMA frame transfer. If the SAV/EAV synchronization is used, an interrupt can

be triggered on each delimiter event.

For 8-bit color sensors, the data stream received can be in several possible formats: YCbCr

4:2:2, RGB 8:8:8, RGB 5:6:5 and may be processed before the storage in memory. The

data stream may be sent on both preview path and codec path if the bit CODEC_ON in the

ISI_CR1 is one. To optimize the bandwidth, the codec path should be enabled only when

a capture is required.