User's Manual
Table Of Contents
- 1 Ordering Information
- 2 Block Diagram and Descriptions
- 3 Electrical Characteristics
- 4 WT32 Pin Description
- 5 Power Control
- 6 Serial Interfaces
- 7 Audio Interfaces
- 8 I/O Parallel Ports
- 9 Software Stacks
- 10 Enhanced Data Rate
- 11 Layout and Soldering Considerations
- 12 WT32 Physical Dimensions
- 13 Package
- 15 RoHS Statement with a List of Banned Materials
- 16 Contact Information
12
PCM _ OUT
A CMOS output with a weak internal pull-down. Used in the PCM (pulse code modulation) interface to
transmit digitized audio. The PCM interface is shared with the I
2
S interface.
PCM _ I N
A CMOS input with a weak internal pull-down. Used in the PCM interface to receive digitized audio. The
PCM interface is shared with the I
2
S interface.
PCM _ CLK
A bi-directional synchronous data clock signal pin with a weak internal pull-down. PCMC is used in the
PCM interface to transmit or receive the CLK signal. When configured as a master, WT32 generates the
clock signal for the PCM interface. When configured as a slave, the PCMC is an input and receives the
clock signal from another device. The PCM interface is shared with the I
2
S interface.
PCM _ SYN C
A bi-directional synchronous data strobe with a weak internal pull-down. When configured as a master,
TBM–CBC5 generates the SYNC signal for the PCM interface. When configured as a slave, the PCMS is
an input and receives the SYNC signal from another device.The PCM interface is shared with the I
2
S
interface.
USB_ D+
A bi-directional USB data line with a selectable internal 1.5 kΩ pull-up implemented as a current source
(compliant with USB specification v1.2) An external series resistor is required to match the connection
to the characteristic impedance of the USB cable.
USB_ D-
A bi -directional USB data line. An external series resistor is required to match the connection to the
characteristic impedance of the USB cable.
SPI _ N CSB
A CMOS input with a weak internal pull-down. Active low chip select for SPI (serial peripheral interface).
SPI _ CLK
A CMOS input for the SPI clock signal with a weak internal pull-down. TBM–CBC5 is the slave and receives
the clock signal from the device operating as a master.
SPI _ MI SO
An SPI data output with a weak internal pull-down.
SPI _ MOSI
An SPI data input with a weak internal pull-down.
RF
This pin can be used when not using a chip antenna or w.fl connector of the module.
AUDI O_ I N _ P_ RI GH T a n d AUD I O_ I N _ N_ RI GH T