Instructions

INSTRUCTION MANUAL
CCG
TDKLambda
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64. Maximum Line Regulation
Maximum value of output voltage change when input voltage is gradually varied (steady state) within
specified input voltage range.
65. Maximum Load Regulation
Maximum value of output voltage change when output current is gradually varied (steady state) within
specified output current range.
When using at dynamic load mode, output voltage fluctuation might increase.
A thorough preevaluation must be performed before using this power supply.
63. Maximum Output Ripple and Noise
This output ripple and noise voltage is measured at connection as shown in Fig.64.
Connect ceramic capacitor (C2 : 22μF) at 50mm distance from the output terminal.
Measure at C2 terminals as shown in Fig.64 using coaxial cable with JEITA attachment.
Use oscilloscope with 20MHz frequency bandwidth or equivalent.
Fig.64 Measurement of Maximum Output Ripple and Noise
Take note that, PCB wiring design might influence output ripple voltage and spike noise voltage.
Generally, increasing capacitance value of external capacitor can reduce output ripple voltage.
Moreover, connecting ceramic capacitor can reduce output spike noise voltage.
Note1）For 3.3V and 5V output models, use two ceramic capacitors in parallel when ambient temperature
becomes lower than 20ºC to reduce ESR.
Load
+

C2
50mm
1.5m 50Ω
Coaxial Cable
Oscilloscope
JEITA attachment
R:50Ω
C:4700pF
R
C
As short as possible
+Vout
Vout
CCG series
C2 : 22μF Ceramic Capacitor
Note1)