Instructions

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9.6.5 Output Queue

The Output Queue is a first-in, first-out (FIFO) data register that stores power supply-to-controller

messages until the controller reads them. Whenever the queue holds one or more bytes, it sets the

MAV bit (4) of the Status Byte register. If too many unread error messages are accumulated in the

queue, a system error message is generated. The Output Queue is cleared at power On and by *CLS.

9.6.6 Error Messages

System Error Messages are read back via the SYST:ERR? query. The error number is the value

placed in the power supply error queue. SYST:ERR? returns the error number into a variable and

combines the number and the error message into a string. Table 9-5 lists the system errors that are

associated with SCPI syntax errors and interface problems. Information within the brackets is not

part of the standard error message, but is included for clarification. When system errors occur, the

Standard Event Status register records them as follows:

Bit Set Error code Error Type Bit Set Error code Error type

5 -100 thru -199 Command 3 -300 thru -399 Device-dependent

4 -200 thru -299 Execution 2 -400 thru -499 Query

Table 9-5: Standard Event Status Register Error Bits

The Status and Error Registers described in the previous section are only one of the status methods

in the IEEE board. There is also a SCPI requirement for error messages that are in the form of:

The user sends the ”SYST:ERR?” query to read the error message. The messages are stored in a

first-in/first-out queue.

The SYST:ERR queue can buffer up to TEN error messages, although the tenth is replaced by the

–350,”Queue Overflow” if an eleventh message is generated. After the queue overflow, only the

first ten messages are stored and the later messages are lost.

The SYST:ERR queue is cleared by:

Reading the messages one at a time using ”SYST:ERR?” until 0,”No error” is read, or

The *CLS (Clear Status) command.

If any message is in the SYST:ERR queue (except ”No error”), then bit 2 of the Status Byte is set. A

Service Request is generated if bit 2 is enabled.