User's Manual

CL865-DUAL Hardware User Guide
1vv0301104 Rev.1 – 2014-03-07
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Reserved. Page 40 of 70
Mod. 0805 2011-07 Rev.2
NOTE:
For minimum implementation, only the TXD and RXD lines must be connected, the other
lines can be left open provided a software flow control is implemented.
NOTE:
In order to avoid a back powering effect it is recommended to avoid having any HIGH logic
level signal applied to the digital pins of the CL865 when the module is powered off or during
an ON/OFF transition.
NOTE:
High-speed UART supports up to 4Mbps. Please refer to the AT command User Guide in
detail.
WARNING:
Consider a mechanical design and a low-capacitance ESD protection device to protect CL865
or customer specific requirements from ESD event to UART port (Pin5, Pin6, Pin7 and Pin8).